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Technology Stocks : Xilinx (XLNX) -- Ignore unavailable to you. Want to Upgrade?

To: Lewis M. Carroll who wrote (2335)	5/20/1999 1:44:00 PM
From: schlep	Respond to of 3291

Hey Lewis, Here is another reason to sell :-) That nifty ALTR feature yourself and so many other engineers like called Signal Tap can not realistically be implemented in Virtex as I began to think about it. The differentiating feature supporting SignalTap in Apex and not Virtex is the abundance of memory in the Apex devices. Compare 20k400 with XCV800 memory blocks (distributed ram would be too inefficient and slow for deep traces). 20k400 -> 104x2kbit blocks => 208kbits xcv800 -> 28x4kbit blocks => 112kbits (potentially you could double the number of blocks (dual r/w) for storing less deep data, but could not read out real time then). as you can probably guess, the xcv800's block rams would be mostly used in the design leaving few available to hold the desired traces that Signal Tap would want to store. you can make some comparisons, but users will start putting in much larger blocks of memory into their design as the ESBs in apex are available, still leaving enough for signal tap. (ie: Two 2kx32bit fifos would use 64 ESBs but wouldn just fit into all of the xcv1000's block rams leaving non for traces) -schlep