Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Scumbria who wrote (59469)	5/24/1999 3:45:00 PM
From: grok	Respond to of 1573988

Re: <... one of the FPU units could be broken and disabled. The part would behave functionally correctly, and benchmark poorly.> Yes, any number of "performance bugs" could be present which prevent some performance acceleration from happening. These bugs are harder to find since all the pre-existing test suites will run correctly. I once attended a presentation by the P6 Verification manager who told about an RTL typo which existed until very close to tapeout because it just disabled a performance optimization.

To: Scumbria who wrote (59469)	5/24/1999 4:38:00 PM
From: Paul Engel	Read Replies (5) \| Respond to of 1573988

SCUMbria - Re: "This assumption is not valid. For example, one of the FPU units could be broken and disabled. The part would behave functionally correctly, and benchmark poorly." Are you joking? The FPU dispatch/scheduler would have to be designed to be reprogrammable, routing FPU instructions to only functional pipes - and the K7 would have to have on-board FPU diagnostics to DETERMINE which pipes were functional, and then REPROGAM the Instruction decoders/FPU Dispatch/Schedulers. The same reprogrammability would have to part of the out-of-order execution and instruction retirement circuits. That explanation is such a desperate stretch of your already LIMITED credibility ! Still feeling real good about that Kflop 7, are you ? Paul