Interra Launches EDA Industry's First Programmable Memory Development System
05/24/1999
Business Wire
(Copyright (c) 1999, Business Wire)
SAN JOSE, Calif.--(BUSINESS WIRE)--May 24, 1999--
New system, with memory description language, enables companies to develop predictable, consistent, effective methodology for memory
design and compiler development
Interra, Inc., the leading provider of software building blocks for the electronic design automation industry, today announced the first tool in its Designer Objects(TM) product line, the MC2(TM) Memory Development System. Interra also announced MDL(TM), the industry's first high-level programming language specifically for memory design.
"Memory is a critical component in every chip design," said Tom Kozas, vice president of marketing for Interra. "The pace of memory development often impacts the delivery date and time to market for a new product. Yet the process is typically, at best, unpredictable and inconsistent; at worst, painfully slow and inaccurate. Our goal in bringing MC2 to market is to streamline memory development and enable semiconductor companies to control the process as well as the outcome."
MC2 automates memory design and compiler creation, enabling companies to deploy a systematic design methodology tailored to their needs. Its automated process helps ensure design consistency, control costs, and maintain development schedules.
MC2 gives memory designers a way to quickly design new memory instances, leverage existing designs, target any process, or create new memory architectures. It gives ASIC designers early access to memories, so they can explore various logic and memory architectures, then quickly generate accurate timing models for each specific memory instance in a design.
"We've evaluated many of the memory development tools on the market," said Rajeeva Lahri, senior vice president, corporate technology and customer engineering at VLSI Technology, Inc. (Nasdaq:VLSI). "We chose Interra's MC2 tool since it enabled us to accomplish our goals for performance, density, and user friendliness. Our memory development team used MC2 to quickly develop and deliver several 0.2-micron memory compilers to our design centers worldwide. We are also using MC2 to develop our next-generation compilers in 0.15-micron technology."
"Time to market for our chips is dependent upon engineering resources" said Saeid Moshkelani, vice president of engineering at C-Cube Microsystems, Inc. (Nasdaq: CUBE - news). "MC2 has saved us years of engineering manpower by eliminating the manual generation of memory instances. For each memory architecture, with a little bit of effort, we port the memory design in the compiler, then in a few seconds, users can generate the instances they need. We use hundreds of instances of each memory architecture in our chips, so MC2 has been very helpful in meeting our commitments."
"The MC2 compiler gives ASIC designers who design at the RT level the ease and flexibility they need to generate complete memory instances without having any memory design expertise," added Kozas.
Technology and Process Independence
Unlike other memory development tools, MC2 draws a clear distinction between memory design and memory implementation. While other approaches constrain designers to a certain memory architecture or process technology, MC2 provides complete technology and process independence through MDL, Interra's new high-level memory design language.
"For the first time, memory designers will be able to achieve the same level of productivity as logic designers," added Kozas. "Industry-standard hardware description languages, such as Verilog and VHDL, have made logic designers extremely productive. MDL extends this high level of abstraction to memory design."
MDL is an easy-to-use Perl-like language that supports full language constructs and contains a rich set of memory-specific constructs. Designers using MDL are able to quickly describe a memory architecture, such as a single-port or dual-port SRAM, and see the effects of different semiconductor processes on the architecture.
Summary of MC2 features MC2 features include:
--Automatic tiling of a memory designer's leaf cells
--MDL, a Perl-like memory description language
--Technology encryption for secure distribution of memories
--A netlist engine that automatically generates Verilog and SPICE netlists for simulation
--A programmable delay module that computes delay and power based on user-specified equations. MC2 plugs into the memory designer's timing characterization methodology
--Flexible timing model generation that supports multiple models like Verilog, Synopsys, and Vital
--Automatic data sheet generation for each memory instance
--Automatic programming of ROM content
--Generates compilers for secure distribution of memory instances
Compatible with Third Party EDA Tools
MC2 compilers support models for proprietary and commercial EDA tools. MC2 models interface at the logical, timing, and physical level with EDA tools from Cadence Design Systems Inc. (NYSE:CDN), Synopsys Inc. (Nasdaq:SNPS), Avant! Corporation (Nasdaq:AVNT), and Mentor Graphics Corporation (Nasdaq:MENT).
MC2's "Programmable Model Generation" capability supports customers who have internal tools that rely on proprietary formats. MC2's model generation engine uses a template expansion approach that enables the customers to generate timing models for commercial and proprietary EDA tools.
Price and Availability
MC2 is available immediately. U.S. pricing starts at $100,000. The memory compiler created from MC2 is a runtime license of MC2 and is licensed separately.
About Interra
Interra, Inc. is a diversified software company that provides products and services to the high technology industry. Interra's business units focus on the electronic design automation (EDA) industry, digital video applications, information technologies and IC design services. Founded in 1995 by Dr. Ajoy K. Bose, Interra is headquartered in San Jose, California, and employs more than 200 professionals in the U.S. and India. For more information, visit the Interra web site at interra.com, phone 408-573-1400 or fax 408-573-1430.
Notes to editors:
1. Product inquiries may be directed to Tom Kozas, Interra vice president of marketing, (408) 467-4218, tomk@interra.com.
2. Product screen shots are available upon request.
EDA Objects and Designer Objects are trademarks of Interra, Inc.
Contact: CONTACT: Interra Jeanne Willis, (408) 467-4246 jeanne@interra.com or Cayenne Communication Lois DuBois, (650) 854-5485 ldubois@batnet.com
08:30 EDT MAY 24, 1999
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