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To: Saturn V who wrote (81904)	5/28/1999 2:52:00 AM
From: Gary Ng	Read Replies (1) \| Respond to of 186894

Saturn, Re: so SSE instructions will find their way into popular performance benchmarks pretty soon. While I would be with Scumbria that SSE are not in use(in general sense), I agreed with you that it is the benchmarks that people cares. Gary

To: Saturn V who wrote (81904)	5/28/1999 2:54:00 AM
From: Scumbria	Read Replies (1) \| Respond to of 186894

SV, However with SSE the main memory is prefetched well ahead of execution Having an instruction for prefetching, and having compilers that can use it effeciently, are two completely different matters. PowerPC has a cache touch instruction, which doesn't get used much because the penalty for incorrectly speculatively prefetching load misses is too great. Scumbria

To: Saturn V who wrote (81904)	5/28/1999 3:10:00 AM
From: Paul Engel	Respond to of 186894

Saturn V - Re: ". You are going to claim that RAMBUS raises bandwidth but not latency, and that latency is more important than thruput. However with SSE the main memory is prefetched well ahead of execution, and thus thruput becomes important rather than latency. You will retort that SSE instructions are not in use. Well SSE enabled compilers are already out, and so SSE instructions will find their way into popular performance benchmarks pretty soon. " I don't think SCUMbria will take kindly to you pre-empting his arguments. Paul