Here's a headline one of the "newspapers" should write:
IBM NEVER, EVER, EVER WANTED RAMBUS MEMORY TO BE SUCCESSFUL SO DROPPING THEIR RAMBUS LICENSE NOW IS A BIG 'SO WHAT!'
I did a search last night on the last 5 years worth of articles, looking for "IBM and Rambus". Here's some of what I found:
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IBM, Reliance lead march toward Direct Rambus alternative -- Two in U.S. back 133-MHz SDRAM . . .
(Company Business and Marketing)
Electronic Engineering Times, Jan 25, 1999 p33(1)
Author
Cataldo, Anthony
Full Text
Santa Clara, Calif. - Though Intel Corp. has turned thumbs down on adding hooks to its chip sets for SDRAMs running faster than PC/100, several chip makers don't see things the same way. A small chip-set company in the microprocessor giant's backyard, Reliance Computer Corp., and IBM Corp. across the continent believe there's plenty of life left in synchronous DRAMs. Carving a path that parallels Intel's straight road to Rambus, the companies foresee using PC133-standard 133-MHz SDRAMs first, and then double-data-rate (DDR) SDRAMs.
…
IBM Microelectronics (East Fishkill, N.Y.) announced last week that it would use its chip-stacking technology offer up to 256 Mbytes on a PC133 module, technology that would bridge to "a non-disruptive transition to DDR."
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"Our memory customers have expressed a strong interest in PC133 as an evolutionary step between PC/100 and DDR. This step ensures continued performance improvements in our memory products," said Walter Lange, memory marketing manager at IBM Microelectronics.
Copyright 1999 CMP Media Inc.
Full Text COPYRIGHT 1999 CMP Publications, Inc.
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Or how about…
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Rambus Loses High-End Designs To Memory Rival.
(IBM and Silicon Graphics will develop double data rate DRAM chips for servers and workstations rather than Rambus DRAM)(Company Business and Marketing)
Electronic News (1991), Dec 7, 1998 p1(1)
Author
Brown, Peter
Full Text
san jose -- IBM and Silicon Graphics last week said they would design double data rate (DDR) dynamic RAM chips into their servers and workstations, giving the technology a big boost in its battle with Rambus DRAM. Hewlett-Packard is also expected to soon announce adoption of DDR in high-end systems.
The developments indicate that although Intel might be able to anoint direct Rambus (D-RDRAM) as the memory technology of choice for personal computers, it has less control over OEMs of higher-end systems. Manufacturers of DRAMs, meanwhile, are hoping to establish DDR as an alternative memory technology because Rambus requires them to make an extra investment in infrastructure and pay royalties to Rambus. If DDR secures a beachhead in servers and workstations, it could advance into the PC arena as well, some believe.
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IBM said it expected DDR to "emerge as the technology of choice, particularly for servers." The company is making a strong commitment to DDR, saying it would only be using DDR memory for its high end servers, according to Lane Mason, product marketing specialist for the memory group at IBM.
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-- Additional reporting by Robert Ristelhueber.
Full Text COPYRIGHT 1998 Cahners Publishing Company
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Then there's (and this one has some interesting server data so I copied the entire article)…
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Compaq, IBM, others seek memory alternatives for Tanner- and Merced-class systems -- Intel preps Direct Rambus for servers.
(Company Business and Marketing)
Electronic Engineering Times, August 17, 1998 n1021 p1(1)
Author
Carroll, Mark
Full Text
…
Though Compaq Computer Corp. plans to use Direct Rambus DRAMs in its Alpha-based servers, the Houston company's technology road map is counting on Rambus to deliver a next-generation RDRAM with higher bandwidth, to become available when Merced-class servers reach the market in several years. IBM Corp. hopes to design its own core logic, which will likely support SDRAMs for use with Merced.
For its part, Intel said it expects that desktops-not higher-end workstations and servers-will drive the transition to Direct Rambus, starting with its Camino chip set, expected to sample soon. Most Merced-class designs probably will use commodity SDRAM memories, said Pete MacWilliams, a fellow at Intel's Architecture Labs. He expressed confidence the Rambus/SDRAM translation ASICs Intel is designing for next year's servers will be available from a variety of manufacturers, though he was not willing to name names.
That ASIC would allow companies to use SDRAMs on a Rambus in-line memory module, a guard against tight availability, relatively high prices or relative lack of scalability of the RDRAMs in the early going.
"In general, our view is people will use SDRAM in servers and workstations for several years," said MacWilliams. "A lot of servers still use EDO [extended-data-out] memory today. New memory technologies are most needed in the desktop, where there is a small total memory and need for high bandwidth."
Still, he said, "There's no fundamental reason Rambus memories can't be used in high-end servers, it's more a matter of when."
Intel expects to visit OEMs here in September to begin detailing plans about how to bring Direct Rambus to what it calls "midrange" servers, using the Carmel chip set that's slated to appear in production samples in July 1999. The Carmel memory controller will support two Direct Rambus channels, which can connect to a total of eight Rambus or SDRAM memory repeater hubs. That could open the door to systems with as much as 4 Gbytes of main memory, using 128-Mbit Direct RDRAM parts or 8 Gbytes of RAM when 256-Mbit parts become available.
"Carmel can support only 2 Gbytes of system memory without the use of repeaters," said the head of R&D at one of Taiwan's leading mainboard manufacturers. "With the use of repeaters, [Carmel can support] four repeater banks."
Toprani said that when 256-Mbit devices become available, each channel can support 1 Gbyte of memory. He said all memories, whether SDRAMs or any others, will require some buffer scheme at very high memory densities.
The use of either RDRAM or SDRAM is made possible by an ASIC or repeater hub that acts as a translator between Rambus channels on Carmel's memory controller and PC-100 SDRAMs on a modified Rambus in-line memory module (RIMM). "There is certainly concern about having multiple quality suppliers" for RDRAMs and translation ASICs, said Tom Bradicich, program director for PC server architecture and technology at IBM.
"The question is does the buffer [ASIC] exist," said Dean Klein, chief technology officer at Micron Electronics (Boise, Idaho). "It's an idea on paper right now."
Without the potentially cost-adding and difficult-to-source ASICs, Carmel-based systems could be limited to 2 Gbytes of RAM, said Klein. But OEMs want to ship the systems with 4 to 8 Gbytes of main memory next year.
"The solution I think most people would like [for next year's PC servers] is good old SDRAM and plenty of it, backed up by these conversion buffers," added Klein. "We would prefer to use SLDRAM in servers and workstations and think there's a consensus of some others with the same belief among non-x86 vendors." However, Klein said he was not aware of anyone who had a license to Intel's key P6 bus technology to design core logic that would use SLDRAMs with the Tanner CPU.
The Carmel core logic is aimed at Tanner, a follow-on to the Pentium II line that will initially top 500 MHz and sport 100- and ultimately 133-MHz external buses.
Which system bus speed to use in a server will be a major consideration next year. "Four CPUs at 100-MHz bus speeds is optimum theoretically," said Jeff Shu of First International Computer Co. "Currently though, few programs have the multitasking threading necessary to maximize the use of more than two CPUs."
Several engineers in both mainboard and core-logic companies here doubt that SDRAM can handle the multitude of timing latencies among the different signals inherent to SDRAMs at 133 MHz.
When it comes to Merced servers, both Bradicich of IBM and Karl Walker, vice president of technology development for Compaq's Enterprise Computing Group, said Direct Rambus memories as they exist today probably won't meet their needs. Compaq is exploring its options with Rambus and other memory makers, Walker said.
For its part, IBM is looking to tap commodity memories-likely SDRAMs-and leveraging error-correction code (ECC) technologies from its mainframe and RISC-based server lines. IBM plans to tap into several ECC techniques used on its non-Intel systems, such as chip kill, which lets systems run despite a frozen 4-bit memory cell; bit steering, which adds on a redundant bit in a failure; "and a few other proprietary things we are working on now," said Bradicich. "You can do these things with Direct Rambus, but at a price."
- Additional reporting by Rick Boyd-Merritt and David Lammers.
Copyright 1998 CMP Media Inc.
Full Text COPYRIGHT 1998 CMP Publications, Inc.
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And finally…
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The Synclink DRAM finds new support.
(Samsung Electronics, IBM support new type of high-bandwidth memory) (Technology Information)
Electronic Engineering Times, July 1, 1996 n908 p1(2)
Author
Lammers, David
Summary
IBM Microelectronics and Samsung Electronics are supporting the proposed Synclink high-bandwidth DRAM technology as a competitor to Rambus Inc's Rambus DRAM (RDRAM). Proponents claim the companies' move is a backlash against Rambus' high royalty requirements. RDRAM promises a 'here-today' solution, but Synclink backers claim the new multibank chips will be a more natural evolution from the currently-used synchronous DRAM without Rambus' proprietary control. Samsung is developing a Synclink chip at its Kilhung, South Korea, research and development center, although it has also licensed the Rambus technology. Synclink is a pipelined memory scheme that would access multiple banks concurrently to offer fast access and the ability to provide data in bursts and move from row to row. It is derived from the IEEE RAMLink standard; the DRAMs would contain sequencer modules controlling two or more banks of memory each.
… (E'nuff Said)
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