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To: Elmer who wrote (82500)6/2/1999 1:24:00 PM
From: Tom Warren  Read Replies (1) | Respond to of 186894
 
Regardless of individual technical merits, I think the biggest difference from Intels viewpoint is that Rambus goes all the way in one step to full performance. The alternative scenario is three steps; pc133, ddr, ddrII. The three step scenario will segment the market for dram, the Rambus approach (if completely adopted) will not.



To: Elmer who wrote (82500)6/2/1999 1:39:00 PM
From: Tom Warren  Read Replies (1) | Respond to of 186894
 
You can turn the pincount argument around the other way. For the same pincount implement multiple rambus channels and achieve bandwidth the alternatives can't. I believe Tenchuhatsu's comment pertains to Rambus ability to process multiple requests concurrently, so long as they refer to a separate bank. Effectively overlapping latency on each request. A 32 chip RIMM has 512 banks if I did the math correctly. A multi-processor system would take maximum advantage of this concurrency.