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To: Tushar Patel who wrote (84101)	6/21/1999 1:56:00 PM
From: philipah	Read Replies (1) \| Respond to of 186894

THREAD - Intel motherboards to carry Symantec's Norton Anti Virus. It's about time! biz.yahoo.com P

To: Tushar Patel who wrote (84101)	6/21/1999 2:04:00 PM
From: Jim McMannis	Read Replies (2) \| Respond to of 186894

At .25u 600 Mhz is about it and yields(also possible good die/wafer) won't be as good at 600 on .25u than on .18u, supposedly. Also the inability to move the L2 cache on die won't give the extra performance boost that having the cache running at full speed would. Also not having the L2 on dies precludes moving to a socket. Which would be another cost saving option. As far as the customer knowing all this, I don't think it matters as MHZ sells-(TM McMannis). Certainly 600MHz on .25u is a lot better than no 600 MHz. We will also see if Intel is having trouble yielding at 600 MHZ if they have to bump the voltage on the 600, say from 2.0v to 2.2v. Jim

To: Tushar Patel who wrote (84101)	6/21/1999 3:23:00 PM
From: Paul Engel	Read Replies (1) \| Respond to of 186894

Tushar - Re: ". If Intel will provide P3@600 (at .25 instead of .18), why is this Coppermine slippage a big deal (other than maybe the .25 is more expensive to manufacture than .18)?" 1. It represents a design/process setback for Intel 2. A 0.18 micron Coppermine - with on-chip L2 cache of 256K running at full speed - is SMALLER than the 0.25 micron Pentium III WITHOUT on-chip L2 cache - so the Coppermine will be CHEAPER to produce 3. At the same clock speed, a Coppermine should outperform a Pentium III - due to the higher speed of the Coppermine L2 cache. 4. A Coppermine SLIP will most likely translate to a slip in the CAMINO/Rambus chip set/memory introduction. Re: "Is there some place with a calendar with are "expected" speeds for K7 over the 6 months to a year along with the Intel expected offerings?" See the AMD thread on SI for all their prognostications and prayers. Paul