Chip recovery should heat up Semicon West
A service of Semiconductor Business News, CMP Media Inc.
Story posted 12:30 p.m. EST/9:30 a.m., PST, 7/9/99
By Bill McIlvaine
SAN FRANCISCO -- Last year, it was copper -- perhaps the standout new-technology debut at Semicon West '98. Chemical mechanical planarization (CMP) and fab automation systems also were among the technologies garnering the most interest and pointing the way to the future of IC manufacturing.
This year, at Semicon West '99, copper is still king, along with CMP, 300-mm technologies, and Rambus testing. "Those are the hottest areas, by far," said Dan Hutcheson, president of VLSI Research Inc., a San Jose-based semiconductor equipment market researcher (see story in the July publication).
The wafer-processing portion of Semicon West '99 in San Francisco, will feature "the battle of the titans"--Novellus Systems Inc. and Applied Materials Inc.--observed Risto Puhakka, vice president of operations at VLSI Research.
Last year, Novellus grabbed the spotlight with its Damascus Complete Copper, built around its Sabre metal deposition system. This year, Applied is battling back with its Millennia series copper electrofill system, which it announced in April, one day after Novellus announced an enhanced Sabre platform.
Puhakka also recommends taking a look at Silicon Valley Group's new symmetric cell-based cluster platform, which streamlines the movement of wafers during resist processing. The three-axis track system design simplifies motion and control variables to eliminate delays and leading to more consistent processing. "It's a really novel concept," he said.
What was a novel concept -- chemical mechanical planarization -- just a couple of years ago is now a mainstream chip making technology, and CMP systems will be even more in abundance this year at Semicon West. Here too, Applied Materials will be a big focus of attention, with a recently announced integrated polisher/cleaner, called Mesa, with its Mirra CMP platform.
But don't overlook Ebara Technologies Inc., said Robert Castellano, president of The Information Network.
Ebara, a Japanese company, introduced an integrated cleaner/polisher two years before Applied did, and has quietly grabbed a big share of development work in Asia, according to Castellano. He believes the CMP market "will be chasing Ebara."
Robotics and software companies have their best showcase ever for 300-mm, said Castellano. Intel Corp.'s announcement that is restarting its dormant 300-mm fab project in Oregon "just fuels the 300-mm initiative." He foresees a big interest in 300-mm tools (and bridge platforms from 200-mm tools) because "now people know it's for real." But he expects 200-mm tools will still be in abundance.
Consilium, the factory software division of Applied Materials, will make the formal launch of its FAB300 manufacturing execution system (MES) at Semicon West. A beta version was released in May, and version 1.0 being demonstrated at the show is an evaluation version, with some modules still to be added, according to Rich Danielson, vice president of marketing at the Mountain View., Calif.-based software concern. The complete, ready-to-run version 2.0 will be released in May 2000, he said.
One of the overriding concerns at last year's Semicon West was the crisis in moving to 300-mm wafers. It prompted a summit meeting during the show's run to clear the air between chip makers and equipment suppliers over who was to blame for the delay in delivering tools and how to get the transition back on track (see story in the July 15, 1998, publication).
Now the issue is whether economic models can help the industry -- both producers and suppliers -- to get control of the pace of technology. The semiconductor industry has revised its own technology roadmap to reflect accelerating die shrinks and other technology changes. Many in the industry believe it's time for the capital equipment makers to produce their own roadmap to keep pace with the chip makers. A meeting of equipment company representatives and trade groups is scheduled during Semicon to start discussing the issue (see story in the July publication).
As it has for the past three years, Semicon West '99 will be split between San Francisco's Moscone Convention Center, with wafer processing equipment, and the San Jose Convention Center, which will showcase automated test equipment, packaging and other backend processes.
Puhakka believed one of the big areas of interest there will be Rambus testers. Although Rambus, the memory-interface technology being pushed by Intel Corp. for its next-generation microprocessors, has been slow to make its debut, the inevitability of Rambus offered the test equipment makers a new market.
"It's like the situation in copper," he said. "There's a whole new opportunity for new suppliers to get into the market, and there will be a lot to see."
Another thing to watch for, he added, is flip chip packaging equipment, as the chip industry moves to ever smaller packages. "All the new tools and materials surrounding that are going to be important because that's just taking off," said VLSI Research's Hutcheson.
To find out why, attendees can visit a seminar on critical issues in wafer-level packaging sponsored by Ultratech Stepper, Tru-Si Technologies, and Flip-Chip Technologies on Thursday, July 15. Semicon West will also feature events on gas distribution, low-k dieletrics, and the status of copper interconnects.
The Eighth Annual Manufacturing Test Conference will feature a keynote speech by Ned Barnholt, executive vice president and general manager of the new Hewlett-Packard measurement organization, addressing "The Coming of Age of Test." Wafer sorting vs. package-test strategies, integrating the test cell, and the impact of strip vs. singulated testing, will also be discussed. A flip-chip tutorial is also offered on July 16.
Chip makers are concerned about their customer relationships in a new industry environment, so "Winning Customer Loyalty Through Customer Satisfaction" is offered on Sunday, July 11 and Monday July 12.
Another timely issue is covered in "Wafer Fab Design: Current and Future Challenges, on Tuesday, July 13. Topics covered will include integration trends, logistics, tool layout for 300-mm, and modular fab design.
Also an industry forum will be held on making semiconductor fabs firesafe. The program will address fab fire safety issues, FM4910 plastics, concerns about process chemical compatibility, testing, listing, tool design, third-party review, and acceptance issues related to codes, standards and insurance companies.
"Interest in clean room plastics with low fire risk is on the rise with research uncovering many materials with superior fire and process properties," said Steven Zenofsky of Factory Mutual Research Corp., a Norwood, Mass. factory safety company and sponsor of the program. "As the complexity and dollar values of clean rooms have skyrocketed, related hazards have grown in proportion."
"Making Semiconductor Fabs Firesafe" will be held Thursday, July 15, from 8 a.m. to 12:30 p.m. at the Westin Hotel in San Francisco, across from the Moscone Center.
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