SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Tenchusatsu who wrote (66762)7/27/1999 8:57:00 PM
From: Cirruslvr  Read Replies (1) | Respond to of 1583371
 
Tench - RE: " I disagree, however, since by the time HotRail is released, the situation in the marketplace may have changed somewhat."

Meaning Intel may already have a successor to Profusion out soon?

Thanks for the info we wouldn't have gotten anywhere else. I only understood what you wrote when you wrote about the disadvantages. I wonder if that means anything. ;)



To: Tenchusatsu who wrote (66762)7/27/1999 10:43:00 PM
From: fyo  Respond to of 1583371
 
Tench - Re: Imagine a central switch chip which acts kind of like a big "Grand Central Station" for all communication between processors, memory, and I/O devices. This switch chip supports a number of ports, called HotRail Channel (HRC) interfaces. Each interface consists on two 10-bit uni-directional ports, each capable of sustaining 1.6 GB/sec of bandwidth. Adding up both directions gives us a total of 3.2 GB/sec bandwidth per HRC. On the other side of each interface is a bridge chip, which connects each HRC to some other interface, either a processor bus, or memory, or I/O. The architecture is designed to be flexible, so some ports can be connected to processors, some to memory, and some to I/O (PCI-X, NGIO, Future I/O, whatever), depending on the needs of the server.

Without knowing the technical details, this sounds pretty similar to the SGI Octane 'crossbar' system (although it resides on the other side of the memory/CPU bus). I don't know how familiar you are with SGI's technology, but it seems to be pretty solid.

Thanks for summarizing the article (unfortunately, I don't have access to MDR, something that could well change soon).

--fyodor