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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Goutam who wrote (72589)	9/20/1999 8:56:00 PM
From: Ali Chen	Read Replies (3) \| Respond to of 1573306

Hey guys, although that visitor from Intelland is a complete moron, he is formally correct about 400MHz. It happens sometimes :) Consider the following: if a bit sequence on any data bit line is say 11111111, no switching on that line will occur. In the worst case, say 10101010, data would switch at the same rate as the clock, but are shifted by 1/4 relative to the clock period. So, formally, the data come at the same 400MHz rate. However, there is a caveat: the overall timing requirements are the same as they would be if the clock is at real 800MHz. For conventional clock scheme where data are sampled at only one edge, the data can change anywhere during the opposite clock edge, so the time budget is about half of the clock\period. For the dual-pumped scheme the allowed time slot for data change is two times smaller than that for the ordinary clocking - they have to switch before the next edge. Therefore the overal design must be done with this in mind, and for the RAMBUS the actual rules are still 800MHz. Period. - Ali, "the screwdriver buddy of PREngle"