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To: Tenchusatsu who wrote (88887)9/24/1999 11:04:00 PM
From: THE WATSONYOUTH  Read Replies (2) | Respond to of 186894
 
Tench,

Apple 500MHz G3 benchmarks

chips.ibm.com

equal in integer performance and only 10% worse in floating point than 600MHz PIII, both at 2V in .25um groundrules. at 40mm2/140mm2 = 29% the size and 6W/33.6W =
18% the power. I hear Moto plans to repipeline the G4 design. Also add on chip L2 and higher bus speed. And of course, move to .18um groundrules. How much impact to Fmax would you expect with deeper pipelining (I think 4 stage currently for G3/G4 vs 12 stage?? for PIII) Comments anyone??

THE WATSONYOUTH