To: Dan3 who wrote (30657 ) 9/25/1999 2:42:00 PM From: John Walliker Read Replies (1) | Respond to of 93625
Dan3,800MHZ data rate, but the frequency is only 400MHZ. Problem is, the now starting to ship alternative, DDR 266, is getting better throughput and lower latency while only having to run at 133MHZ. Everybody has been working with, and has confidence in, 133MHZ, while 400MHZ is something that is starting to sound more than a little scary DDR at 133 MHz transmits data every 3.76 ns. That is not a long time for each bit to rise to its correct level, for the ringing on the data bus to settle down, for the data to be latched in the receiving device and for the drive to be switched off in readiness for the next bit. Although Rambus has to do this 3 times faster, it does so in a much better defined signal environment. One should not underestimate the difficulty inherent in doing this in a production environment with varying device characteristics from different manufacturers, with no system for automatically recalibrating the drivers for temperature changes and with far more signals needing to be terminated if clean transitions are to be achieved. Above all there are long stubs leading on to each DIMM which inherently cause reflections. Remember, the bus settling time will not be materially shorter for DDR 133 than for PC133 but there is half the time available for each bit. Also, clock, address data and device select signals will have different numbers of chip inputs loading them, tending to cause timing skew. Intel require that loading capacitors are used on certain PC100 DIMM signals to minimise this effect. However, small value capacitors tend to have poor tolerances and will not necessarily track variations in device input capacitance due to process changes and manufacturer variations. John