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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: Bilow who wrote (32945)	10/26/1999 9:10:00 PM
From: Bilow	Read Replies (6) \| Respond to of 93625

Hi all; A note on the bandwidth per pin, and the number of pins required by RIMM modules, versus the same on DDR DIMM modules. The two parts compared here, are both x72 memories. Both RIMMs and DDR SDRAM DIMMs are in 184 pin packages: rambus.com micron.com Such as it is, Rambus provides no reduction in total pin count. But pins can come in three classes: Power, Signal, No Connect (NC). From the above PDF files, here are the totals for the two solutions: Power Signal NC Total Rambus 86 74 24 184 DDR 49 125 10 184 Rambus, due to it's nasty high speeds, requires more power pins. It also saves about one third of the signal pins. Some of the DDR NCs will be used for address pins later on, but this will not change the numbers very much. It is also possible to socket the Rambus RIMMs in 168 pin sockets, I believe, but of course the difference is taken out of the NCs. The reason why only 1/3 of the signal pins are saved is due to the following: (1) The Rambus channel pins both enter and exit the RIMM module. Consequently, they make two pins each. (2) The pin count reduction is best in the data bus, but there are a lot of other pins that are still there. The DDR DIMM puts out 266MHz at 8 bytes wide, or 2.128GB/sec. The Rambus RIMM puts out 800MHz at 2 bytes wide, or 1.6GB/sec. The bandwidth per signal pin on the DDR module is 2.128GB/sec / 125 = 17MB/sec/pin. The bandwidth per signal pin on the Rambus module is 1.6GB/sec / 74 = 22MB/sec/pin. From the point of view of the mother board, Rambus provides very little performance gain in terms of bandwidth per signal pin, and actually provides less bandwidth per total pin. In addition to this, DDR is easier to design with, easier to manufacture both in chips and in boards, is considerably cheaper to make, and doesn't require paying royalties. -- Carl P.S. Rambus also provides much, much less performance per NC pin. :)