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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Elmer who wrote (82647)12/10/1999 9:35:00 PM
From: Bill Jackson  Read Replies (1) | Respond to of 1572778
 
Elmer, If you take the average tested speed of all the acceptable cpus from a wafer you will find this average is what Petz speaks of. Obviously there will be speed variations among the candidates on the wafer and the speed and pattern of the speeds will be studied to see if any tweak of the process variables as well as of the bulk Si properties will make this average go up without decreasing the number of graduating candidates. This all seems quite reasonable in terms of quality control and will eventually lead to a higher yield of faster CPUs, which is in fact what we see as they perfect the process.

Bill



To: Elmer who wrote (82647)12/12/1999 12:08:00 AM
From: Petz  Read Replies (1) | Respond to of 1572778
 
EP, re:<the speed of any individual die is determined at final test and has nothing to do with the wafer>

This couldn't be done with the original PIII's because the L2 cache speed (SRAM) had to be selected before final packaging. I thought perhaps that each batch or each wafer might have a target maximum speed determined by sampling, and that no die on that batch would be tested at higher than the target speed.

Doing it this way you could save some test time at the expense of underbinning some parts. If the variation in Fmax, within a wafer or between wafers in a batch, is large, then you could wind up underbinning a lot of parts, leading to overclocking stories like we've read about.

Petz