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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Petz who wrote (84966)1/4/2000 3:27:00 PM
From: Scot  Read Replies (1) | Respond to of 1572296
 
Petz,

the conclusion I draw from poor K6-2+/K6-3+ speeds is that AMD is having a hard time getting the cache to run at full speed. Intel recognized this problem early on, which is why CuMines integrated L2 cache actually runs at half speed (but 4X access width of 256 bits).

This seems quite likely at this point...doesn't it. I wonder whether comparisons with the K7 are apples to oranges at this point?

I.e., how much trouble is AMD going to have transitioning to full speed on the Athlon?

-Scot



To: Petz who wrote (84966)1/4/2000 3:36:00 PM
From: kash johal  Read Replies (1) | Respond to of 1572296
 
Petz,

Re:"kash, the conclusin I draw from poor K6-2+/K6-3+ speeds is that AMD is having a hard time getting the cache to run at full speed. Intel recognized this problem early on, which is why CuMines integrated L2 cache actually runs at half speed (but 4X access width of 256 bits)."

I suspect that you are wrong.

I think the 0.25 process was already running with a 0.18 micron front end. So the first version of AMD's 0.18 micron keeps the same front end(transistors) and simply tweaks the final routing layers for extra density and reduced RC's. This is probably good enough for 1-2 speed grades.

The reason that ATHLON has scaled so well in this move is that the chips were power limited rather than delay limited. So reducing the RC loading delays helped tremendously.

This two-step move by AMD is the reason that its 0.18 process has ramped so well (as a big surprise to analysts). They have been running the faster front end process for months with millions of latter day Athlon/K6-2's shipped.

My understanding on the next "two-step" by AMD is to keep the metal routing and die size the same but the front end will move to a 0.13 transistor.

Frankly the issue with the K6-3's methinks was the dumb cache design without redundancy giving poor yields. Hopefully AMD has learnt this lesson well.

regards,

Kash