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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Bill Jackson who wrote (87175)	1/14/2000 2:33:00 PM
From: Petz	Read Replies (1) \| Respond to of 1572953

Bill, its interesting to read these architecture comparisons such as you posted (between Athlon and PeeWeeIII. In many ways the roles have been reversed. Back in the K6 vs. Pentium MMX days, the K6 could beat the Pentium in integer benchmarks but would lose in floating point every time because the K6 had a bigger and better cache (both L1 and L2), but Intel had a pipelined floating point add/subtract unit. The same was true for K6-3 vs. PIII. In integer a K6-3 easily outperformed a PIII one speed grade higher. Unfortunately, it couldn't in floating point, and as Jim McMannis says, "MHz sells." Again, AMD had the advantage mostly because of faster memory access due to the full speed on-die cache. Now its the Floppermine with the faster cache, but weaker FPU. A floppermine will never do more than one floating point operation per clock cycle, an Athlon can do two. (I'm ignoring the low precision FP operations.) The future looks bright for the Athlon, since the processor core does not have to be modified to improve the memory performance to Coppermine levels. The Athlon will benefit enormously from faster memory access because its multiple execution units are running "starved for data." If there's one thing I'm worried about architecturally with the Athlon, its the fact that AMD may not be using the same idea as Intel for the on-die L2 cache SRAM -- the idea of clocking the SRAM at half the rate, but having 2x or 4x data paths to it. I think its easier to manufacture a 500 MHz double width SRAM than it is to manufacture a 1 GHz SRAM, whether its on-chip or not. Petz