To: Artslaw who wrote (520 ) 1/27/2000 2:22:00 AM From: tech101 Read Replies (1) | Respond to of 1056
Packaging Is Playing a More and More Role for the Core of Chip Technology New Trends in Chip Design In the early history of the processor, integration technology was lagging behind what was necessary to contain all of the functional units on a single chip. Slow communications between chips incurred a severe performance penalty when the program flow called for remote resources. This barrier to efficient and speedy operation of computers is what led to new architectures of processors (such as RISC) and increases in IC package density. Now, perhaps ironically, we are at a point where the debate over processor architecture wanes in the shadow of new packaging technologies for this advanced breed of chips. Inter-chip communication schemes have also made great strides, in conjunction with innovative package enhancements. For instance, there are three-dimensional (3D) chip packages that place multiple dice in a vertical arrangement, with an optical transceiver above. The optical transceiver sends and receives control, address, and data signals between chips, while enabling a reduction in PCB area and layout complexity. In conjunction with the 3D packages, Multi-Chip Modules (MCMs) are becoming more common. This type of chip contains multiple cores on a single die, with arbitration methods enabling communication between functional units and I/O. Together, the impact that these two arrangements will have on chip and board design will be tremendous. With the existence of adequate inter-chip communications, it will become possible, for the first time, to completely upset the current paradigms of computer architecture. The driving force behind the many different processor architectures has been the constant search for the most efficient configuration of scarce hardware resources within a given package or die area. Now, the focus will be on eliminating bandwidth concerns at a level previously thought impossible. To gain an appreciation for the level of complexity involved in designing new IC packages and choosing which is more appropriate for any given design, we can turn to the field of ASICs. A growing concern in this area has been the rapidly increasing number of I/Os associated with diminishing package areas. This directly translates into new concerns, such as PCB layout, thermal performance, testing and manufacturing, and the actual chip performance limits of the package. It will be interesting to see what new trends in processor architectures may develop as these new IC packages and inter-chip communication technologies mature and become widespread. Just as the original dilemmas led to forming distinct architectures such as RISC and CISC, perhaps this leap in technology will create a new evolutionary path for the microprocessor. chipcenter.com