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AMD, Via tout top bus speed for chipsets
By Mark Hachman, Electronic Buyers' News Jan 28, 2000 (11:20 AM) URL: ebnews.com
Now that Advanced Micro Devices Inc. has its Athlon microprocessor chugging along under a full head of steam, the company and its chipset associate, Via Technologies Inc., are tipping plans to keep the platform moving at top speed. Not surprisingly, the announcements were made at Platform 2000, a conference sponsored by InQuest Market Research, Gilbert, Ariz., and dedicated to non-Intel PC components. Via and AMD both chose to focus on their chipset roadmaps rather than their microprocessor designs.
Even as AMD and Intel Corp. battle to outdo each other in processor clock speed, AMD's chipset division and Via hope to differentiate their respective platforms by exploiting the CPU's 200-MHz EV-6 microprocessor bus. Already much faster than Intel's 133-MHz microprocessor interface, AMD plans to deploy the AMD-760 and AMD-770 chipsets in 2001 at a 266-MHz microprocessor bus speed, said Ron Huff, division marketing manager at the company's Computation Products Group in Sunnyvale, Calif.
Aimed respectively at one- and two-processor systems, the 760 and 770 chipsets will feature interfaces to PC2100 and PC1600 double-data-rate memory, four Universal Serial Bus connections, plus a "future storage interface," which observers say most likely will be ATA-100.
AMD's chipset group is uniquely designed within the company to serve not as a profit center but an enabler, according to division marketing manager Byran Longmire. AMD is thus more open about licensing its technology, the company explained, and already has licensed its chipset technology to Acer Laboratories Inc., Silicon Integrated Systems Corp., and Via.
"That's not to say we're going to do it for free," Longmire added. "But we're an enabler, and high royalties are a disabler. We also have the option of doing an IP exchange in some cases." One technology Huff indicated that AMD might license is its Lightning Data Transport bus, the isochronous bus designed for future multiprocessor systems, including the AMD-770. In a dual-processor system, the LDT will be used to connect the north and south bridges at up to 3.2 Gbytes/s. In an eight-way system using a different, forthcoming chipset, two Athlons will each connect to a north bridge, which in turn will be connected to each other via an LDT bus. Additional LDT links will be used to transmit data throughout the server.
Unlike Intel, Huff said the IEEE 1394 serial interface and Universal Serial Bus version 2.0 technology are both on AMD's long-term chipset roadmap, although plans call for the company's partners to develop these technologies. Via, for example, is shipping a 1394 core, although its die size may prohibit it from being used until the next manufacturing generation, according to Dean Hays, director of marketing at Via's U.S. operations in Fremont, Calif. Intel, on the other hand, views USB 2.0 as a superior PC-centric technology and has no plans to integrate 1394 in the foreseeable future, one analyst noted.
AMD's chipset team will concentrate on multiprocessor systems, leaving the high-volume, single-processor PC market for chipset partners such as Via, which is using its joint venture with S3 Inc. to drive down the costs of the Athlon platform and increase sales. For now, however, Via has foregone the use of the faster, 266-MHz frontside bus and is concentrating instead on integrating graphics functions.
From an Intel-compatible standpoint, Via in a matter of weeks will follow its Apollo Pro 133A chipset with the VS1-P6, the first integrated S3-Via chipset for the Pentium III. A forthcoming P6-PC266 chipset will add PC266 double-data-rate SDRAM support when it ships in volume in the third quarter. The DDR capability will then later be mixed into another integrated graphics part, the VS10-P6.
Via's Athlon plans, meanwhile, parallel the company's Intel-driven roadmap. Via previously disclosed part of its lineup, including the KX133, a PC133 DRAM-enabled chipset for the Athlon. The Taipei, Taiwan-based company this week also revealed two more chipsets: the low-end VS2-K7, the first Athlon chipset to integrate S3's Savage4 graphics chip; and the VS-12K7, the Athlon equivalent of the VS10-P6.
Via's goal is to allow OEMs and designers to lay out a single board for multiple chipsets, Hays said. For example, Via will design an Apollo KZ133 for the Pentium market in the same package as the VS-2 K7. But as Via moves to DDR memory, its single-board strategy faces a problem: single-data-rate DIMMs require a 168-pin connector, while DDR DIMMs use 184 pins. The company is working with the JEDEC industry council to develop a module that can accept both types of DRAM, according to Hays.
In a related area, Acer Laboratories Inc., Hsinchu, Taiwan, introduced the Aladdin Pro 4, a PC133-enabled chipset whose M1535 and M1535D south bridges include an ATA-66 storage interface, integrated audio, and four USB ports.
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