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This ain't no disco:
This is what all you bussers have been looking for: a monopoly play on next-gen memory.
You need to check out OUM, Ovonyx and ECD (Nasdaq: ENER).
OUM is Ovonic Universal Memory. It is the electronically switched counterpart to the technology now being used in all RW media used on optical drives (CDRW and DVD-RAM).
Ovonyx is the 50-50 joint venture between ECD and Tyler Lowrey (the former chief of technology at Micron), formed to develop and bring to market OUM.
ECD is Energy Conversion Devices. Their stock recently jumped up in sympathy with the fuel-cell stocks -- a recognition of their metal-hydride H2 storage technology.
They are also world leaders in NiMH batteries, photo-voltaic cells, thin-film deposition technologies, and the phase-change RW technology.
IMO the stock is still cheap and I more than doubled my position at $19.
Check out the ECD website tech-info (there is a slide-show on OUM): ovonic.com
Here's a couple seminal posts on OUM:
Message 12746264
Reply to another question by Alfranco.
Question 2: "If we can go down to .05 microns (current best is .18 microns I believe in production) will this mean less current consumption and more compactness in these chips? If so, isn't this an advantage for operating time for hand held devices and storage capacity and even speed of operation?"
Simple answer is Yep, on all counts.
What we are talking about here is the "process" size, which I denote below as "F" for feature size. This "F" notation was used in a good article on the difficulties involved in producing the next generation of DRAMs, the 1 Gigabit chips. The meaning of F is simply that this is the width of the narrowest conductor strips that can be formed on the chips given the resolution of the wafer fabrication techniques used.
The crucial problem for higher memory cell density for DRAMs is that the capacitive memory element is much larger than the small transistor used in conjunction with the capacitor to form a memory cell. The capacitors lose their charge carrying capacity as they are made smaller, and this is a practically impossible problem to overcome as present DRAMs are made even a little denser. For ENER's OUM, however, the memory element can be made as small in width and length as F -- i.e., much smaller than a capacitive element and about the same size as the transistor junction itself.
Since memory cells must necessarily be larger than F^2 (F squared), a nice measure of the efficiency of a memory cell design (in regard to cell density) is C, where the cell size is expressed as C*F^2. C is now about 8 for lab devices, and IBM is claiming they can achieve 6, by way of forming the transistor inside the walls of the capacitor. This is a neat, but also desperate and probably expensive, trick. But, note that if wafer processing improves to give a smaller F, the size of the needed capacitor is not reduced by this change since the necessary charge-holding (capacitance) of the capacitor is not reduced. So, C would automatically increase for IBM, i.e., their cell size would not be reduced by much. For OUM chips, on the other hand, the cell size reduces a lot for reductions in F -- roughly by F^2. This is because the transistor and the OUM resistive dot both scale as F^2. If F is reduced by 1/2, the cell density goes up by 4.
This means Giga-cell chips can likely soon be made with our OUM technology. Further, due to the multi-bit capability of each OUM cell, multi-Gbit non-volatile chips should soon be possible. Wow! Giga-BYTE chips anyone? Just a SIMM or few and you have a large-capacity "electronic disk". (ECD claims that the OUM chips can be easily stacked!) Ssslllooowww, fragile, clunky hard drives -- goodbye you foul beasties!
What is the practical limit for OUM memory cell size? From the SI Board:
>Tyler Lowery mentioned that silicone is reaching it's practical limits for size reduction. Our chips would be able to store information in a cell 100x200x500 atoms big. (Also) We will be able to merge the memory and logic together on the same chip, which can't be done with flash.<
Except for very large ones, atoms are only about two Angstrom units wide, or about 0.2 nanometers. So, in nanometers, Tyler is saying 20x40x100, or in micrometers ("microns"), 0.02x0.04x0.100 (Al, because about one-half the area would be taken up by the OUM dot, these dimensions are consistent with your "0.05" micron number). Since the thickness is likely the 0.02 micron dimension, the "in-the-limit" cell area is then 0.04 *0.1 equals 0.004 sq microns. One square centimeter has 10^8 sq microns, so a 1 cm square chip could hold about 25 Gigabits (oops, sorry, GigaBytes since an OUM cell carries multibit capability). I am genuinely impressed.
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Sharp questions, Al. I will try to address them, but it will take some time and a few posts as I do not want to simply propound unsupported answers. First, let me comment on your Question 3: ?Could a desktop then just be fitted with these chips as memory chips without a harddrive at all? No more frozen harddrives and unretrievable data and bootups and retrieval lag times as info. is transferred from the hard drive to current volatile RAM??
Short answer is Yep. Here is what a recent patent (#5,912,839, 15 June 99) to ECD says. Note the mention also of artificial intelligence systems, which are growing in importance.
>In contrast to DRAM and SRAM, volatile memory devices, and other "flash" devices such as floating gate structures, no field effect transistor devices are required in the electrical memory devices of the present invention. In fact, the electrically erasable memory elements of the present invention represent the simplest electrical memory device to fabricate, comprising only two electrical contacts to a monolithic body of thin film chalcogenide material and an isolation device. As a result, very little chip "real estate" is required to store a bit of information, thereby providing for inherently high density memory chips. Further, and as described below, additional increases in information density can be accomplished through the use of multivalue-digital-multibit storage in each discrete memory cell.
The solid state, electronic memories presently in use are relatively expensive to manufacture, the consumer cost being typically about twenty times the cost per bit of storage capacity in relation to magnetic disk storage. On the other hand, these solid state, electronic memories provide certain advantages over magnetic disk memories in that they have no moving parts, require less electrical energy to operate, are easy to transport and store, and are more versatile and adaptable for use with portable computers and other portable electronic devices. As a matter of fact, hard drive manufacturers are forecasting rapid growth in the use of ever smaller hard drives and eventually solid state memory storage in the portable computer field. In addition, these solid state memories are usually true random access systems as opposed to disk types which require physical movement of the disk head to the proper data track for accessing the desired memory location. However, in spite of such advantages, the higher cost of solid state electrically erasable memories have prevented them from enjoying a substantial share of the market now dominated by magnetic memory systems. Although solid state electrically erasable memories could potentially be manufactured at reduced cost, the overall price-to-performance ratio of these devices is inadequate for them to fully replace magnetic disk systems.
Simply stated, no solid state memory system developed prior to the present invention, regardless of the materials from which it was fabricated, has been inexpensive; easily manufacturable; nonvolatile; electrically writeable; capable of multivalue-digital-multibit storage in a single cell; and capable of very high packing density. The memory system described hereinbelow, because it addresses all of the deficiencies of known memory systems, will find immediate widespread use as a universal replacement for virtually all types of computer memory currently in the marketplace. Further, because the memories of the present invention can be fabricated in an all thin-film format, three-dimensional arrays are possible for high speed, high density neural network, and artificial intelligence applications. The memory system of the present invention is therefore uniquely applicable to neural networks and artificial intelligence systems because its multi-layer, three-dimensional arrays provide massive amounts of information storage that is rapidly addressable, thus permitting learning from stored information.
And for good measure:
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Nobody thought ECD's phase-change technology would win in the RW arena. Everyone knows how History likes to repeat... I'm ready for cheap, 1ns-25GB/sq-cm unified memory/storage. It's coming sooner than most people think.</hype>
wily
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