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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Tenchusatsu who wrote (92737)2/12/2000 11:29:00 AM
From: Scumbria  Respond to of 1573695
 
Ten,

The 4:1 rule of L2:L1 cache sizes would mean that T-bird needs 512K. But then again, I guess AMD can get away with 256K and still have a very strong performer.

Indications are that AMD is using a victim (allocate on expulsion from the L1) cache, which is much more efficient than a traditional allocate on L2 miss cache. Even a small victim cache will improve performance to some extent.

Scumbria



To: Tenchusatsu who wrote (92737)2/12/2000 11:59:00 AM
From: Charles R  Read Replies (1) | Respond to of 1573695
 
<The 4:1 rule of L2:L1 cache sizes would mean that T-bird needs 512K.>

Are you choosing to ignore the possibility that this could be a victim cache and the 4:1 ratio is meaningless?


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