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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Scumbria who wrote (93457)2/16/2000 1:20:00 AM
From: milo_morai  Read Replies (1) | Respond to of 1571068
 
This is due to the slew rate of the transistors right?

Also wouldn't Xc be a issue at 3Ghz?

Milo



To: Scumbria who wrote (93457)2/16/2000 1:22:00 AM
From: Process Boy  Read Replies (1) | Respond to of 1571068
 
Scumbria - <There is no way that the Willamette integer unit is running at 3 GHz in 0.18u at room temperature. Whatever they today did was something else other than what they tried to make it appear.>

Scumbria, in a way I agree with you. Discrete .18 xtors will not run at 3GHz.

However, lets say for example that the data transfer occurs as Dan and Anand say, at the rise and the fall of the clock. How would you characterize the speed of the Integer unit?

Isn't this the same sort of argument that occurs for FSB's? I.e., the EV6 is a 100MHz with 2x data transfer, and very commonly referred to as a 200MHz bus?

PB



To: Scumbria who wrote (93457)2/16/2000 1:25:00 AM
From: milo_morai  Read Replies (1) | Respond to of 1571068
 
The fundamental speeds of 0.18u transistors at room temperature are too slow to do any kind of meaningful work in 333 picoseconds.

0.333ns or 333picoseconds is very fast. Do You think there would also be L2 cache issues?

Milo