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To: Gary Ng who wrote (99339)2/17/2000 2:30:00 AM
From: Tenchusatsu  Read Replies (4) | Respond to of 186894
 
Gary, <Anyone knows anything about this 870 chip set>

Yeah, that's my current project. ;-) Seems like Justin Rattner is spilling the beans for the first time regarding 870.

The main feature of the 870 chipset is the Scalability Port. Here's what the article says regarding SP:

The 870 chip set will use a cache coherent link called a scalability port which will allow OEMs to attach multiple four-way SMP processors into larger, more powerful systems with distributed system memory. The chip set is targeted at the next generation 32-bit Foster processors expected to ship late this year and the 64-bit McKinley processors which will ship next year.

To date Intel's chip set work has focused on enabling systems using two, four or eight processors. "With the new scalability port we can link two or more 4-way systems," Rattner said. "This allows OEMs to build 8-, 12- or 16-way systems."


Intel will build several platforms revolving around the 870 chipset and SP. Intel will also license SP to various server vendors such as IBM's Sequent group or Unisys. They'll be able to take some of 870's components, link them together using SP, and come out with 16-way systems and above.

870 will work both for Foster (IA-32 server version of Willamette) and McKinley (IA-64 follow-on to Merced/Itanium). The chipset will also support both DDR SDRAM and RDRAM.