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Technology Stocks : Cymer (CYMI) -- Ignore unavailable to you. Want to Upgrade?

To: Darryl Olson who wrote (24313)	2/21/2000 7:59:00 PM
From: orkrious	Read Replies (3) \| Respond to of 25960

Borrowed from the AMAT thread. CYMI will just keep climbing that wall of worry. MIT lab makes 0.05-micron gates with phase-shifting, 248-nm lithography Semiconductor Business News (02/21/00, 11:36:22 AM EDT) SAN JOSE--Numerical Technologies Inc. here today announced fabrication of the world's smallest transistor gate lengths, measuring 50-nanometers, with the company's phase-shifting photomask technology and deep-ultraviolet optical lithography. The 50-nm (0.05-micron) transistor gates were produced by Massachusetts Institute of Technology's Lincoln Laboratory in Lexington, Mass., using DUV 248-nm lithography equipment, said NumeriTech. "People have been predicting the end of optical lithography for several years, saying that it can't extend beyond 100 nanometers," said Y.C. (Buno) Pati, president and chief executive officer of NumeriTech. "TheMIT Lincoln Laboratory results prove that with prudent use of phase shifting, optical lithography can be extended much further than anyone ever thought was possible." The experimental devices were produced by the MIT laboratory as part of a program sponsored by the Defense Advanced Research Projects Agency (DARPA). The program is focused on sub-100-nm fully depleted silicon-on-insulator CMOS technology. According to NumeriTech, this is the first time 248-nm lithography equipment has produced a 50-nm device. Today's 248-nm manufacturing tools and photomasks are just now beginning to produce ICs with feature sizes slightly below 0.18 micron. NumeriTech said experts have previously estimated that next-generation 157-nm lithography would be required to print lines at 70 nm. Some estimates show it taking the chip industry up to 10 years to fully develop 157-nm lithography tools and supporting technologies, said the San Jose company. On March 2, technical details about the fabrication of 0.05-micron gates will be presented by MIT researchers during a conference sponsored by the International Society for Optical Engineering (SPIE) in Santa Clara, Calif.