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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Dan3 who wrote (95378)	2/27/2000 2:12:00 PM
From: Scumbria	Read Replies (1) \| Respond to of 1578294

Dan, The Ace's article appeared to be a marketing document for UltraSparc. The discussion of load latency was grossly inaccurate. Athlon and PIII use a 3-cycle cache, but load latency is not a big issue due to pipelining and instruction scheduling by the compiler. I'm rather surprised that they are bragging about a single-cycle cache, given that they missed their frequency target by about a factor of two. I did enjoy the feeble attempt to justify why Ultrasparc 3 is so late. Given that being paranoid about checking for reliability often means lots of red tape (or bureaucracy in general), this could explain why Sun's development time is quite long compared to other designs. Scumbria