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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Joe NYC who wrote (108700)	4/30/2000 11:04:00 PM
From: Dan3	Read Replies (2) \| Respond to of 1571806

Re: on a quad pumped bus, the transfer of information occurs on rising, falling edge, as well as high and low levels... Hi Joe, I don't think it can work that way. I'm no EE, but I'll try to explain why I think this is the case - maybe someone who really knows this stuff can tell me if I'm making any sense. To make it easier to visualize I think about a data string of 0 1 0 1. I'm pretty sure it would be running the data lines at twice the MHZ supported by the spec if it tried to communicate 4 bits in a cycle. In other words, a wave (or cycle) has a peak and a trough. You can have it peak or not peak for one bit per cycle, trough or not trough for a second bit, but you can't get any more bits out of a wave than that. I suppose you could run the data lines at twice the frequency of the clock lines, but if you're designing to support those frequencies anyway, why not let the clock lines support the higher rates as well? Does that make sense? Regards, Dan

To: Joe NYC who wrote (108700)	5/1/2000 1:19:00 AM
From: Tenchusatsu	Read Replies (2) \| Respond to of 1571806

Jozef and others, re: quad-pumping, For double-pumped buses, it's a common misconception to think that the data is being latched on the rising and falling edges of the main clock signal. In fact, when data is sent down a double-pumped bus, strobes (both positive and negative) are sent along with the data. Then the data is latched off the rising and falling edges of the strobes. These strobes are essentially square waves, just like a clock signal, and in fact they run at the same frequency as the clock. However, the phase of the strobes are such that the edges line up with the data. Then with the phases all lining up, the strobes and the data are sent in parallel. Because of this parallel transmission, the phases (hopefully) stay lined up from sender to receiver. A quad-pumped bus would have strobes running at twice the frequency of the main clock. Combine 2x the frequency with rising and falling edges, and you have 4x the data rate. This is how it's done on the Itanium bus (2x133) and on the Willamette/Foster bus (4x100). I don't know how it's done on DDR, but I'd imagine it's pretty similar. Tenchusatsu