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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Scumbria who wrote (114033)	6/3/2000 3:43:00 PM
From: DRBES	Read Replies (1) \| Respond to of 1572935

re: "If there is a big performance bonus from T-Bird, it may be in clock speed from Dresden. Don't count on big benchmark numbers from T-Bird, because you will be disappointed." This sounds to me as though it comes from a source very close to AMD. It is entirely consistent with the growing impression that I have gotten that they (AMD) are prone to vast understatement so that they can give positive surprises to the market and a periodically scare the *iss out of the leadership at inteL. (This, of course, presumes there is any leadership at inteL now; there is a gatering body of evidence of a vacuum where there once was some leadership.) Regards, DARBES

To: Scumbria who wrote (114033)	6/3/2000 6:40:00 PM
From: porn_start878	Read Replies (1) \| Respond to of 1572935

Scumbria, As for the L1 miss rate, I think someone tried to benchmark the Athlon with the L2 cache disabled (to speculate on an eventual Spitfire without L2) and the result was very disappointing. For that one I really don't have the courage to go look back and look for the link since it was done somewhere in Q1. Another fact that gave me some hope, is when I saw 800+ Athlon losing some ground to the PIII due to slower caches. Finally the high level of associativity contributed a little bit too even if I don't understand well the impact of a high associativity (I think it lower the miss rate by associating a larger part off the virtual memory... as you can read it is pretty obscure in my mind) I was expecting a 20-30% increase, I still expect at least 10%. Hope you're wrong :) Max

To: Scumbria who wrote (114033)	6/4/2000 2:37:00 PM
From: Charles R	Read Replies (1) \| Respond to of 1572935

Scumbria, <T-Bird is not going to show a huge performance improvement over Athlon on most benchmarks. The reason is very simple. Athlon has a huge (128K) L1 cache, which gets a high hit rate. Speeding up the L2 for the infrequent L1 misses will produce only incremental performance improvement. This is a different situation from the PIII->Coppermine transition, because PIII has a small (32K) L1 cache. If there is a big performance bonus from T-Bird, it may be in clock speed from Dresden. Don't count on big benchmark numbers from T-Bird, because you will be disappointed.> Agree with everything but the last sentence. I expect Thunderbird benches to be extremely good with proper DDR enabled chipset and DDR133 should be slightly better than DDR100. Chuck