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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Tenchusatsu who wrote (114412)	6/5/2000 4:16:00 PM
From: EricRR	Read Replies (1) \| Respond to of 1574386

For example, back when Intel made the transition from Klamath (0.35u Pentium II) to Deschutes (0.25u Pentium II), the L2 cache latency was increased slightly. This made Deschutes a little slower than Klamath at the same clock speeds, but it also allowed Deschutes to scale to higher frequencies than what Klamath could ever hope to reach. In the same sense, AMD could do the same thing with T-bird's L2 latency if necessary. But this is my question! Perhaps the high latency is not the result of bad engineering, but a portent of higher clock frequencies to come. This assumes though that changing the latencies is not a trivial thing that could be done say at every new stepping, otherwise it would make more sense to change it "real time" as needed.