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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: pgerassi who wrote (115703)6/13/2000 10:34:00 AM
From: Scumbria  Read Replies (1) | Respond to of 1576587
 
Pete,

I understand exactly what a victim cache is.

I'm saying that the L1 castouts which are going into the L2, should be buffered and written into the L2 when the L2 is idle, rather than in the middle of an L2 read access.

Unfortunately, the T-Bird L1-L2 bus is too narrow to support this properly.

Scumbria


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