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To: Hans de Vries who wrote (2605)7/28/2000 1:32:12 AM
From: Charles RRead Replies (1) | Respond to of 275872
 
Hans,

<These are the advantages which are normally related to going
to a finer process geometry. (Say from 180-nm to 150-nm)
It would give AMD a clear advantage.>

I guess I cut and pasted the wrong thing. This is what I was referring to:

"The gate is put on top in the usual way but the Drain and the Source are placed on the vertical
sides of the block! The open spaces between the blocks are used for the isolation between
the transistors. They are filled with an isolator."

Chuck



To: Hans de Vries who wrote (2605)7/28/2000 1:33:46 AM
From: Pravin KamdarRead Replies (1) | Respond to of 275872
 
Hans,

AMD's new transistor could also be matched with SOI for additional performance and power reduction.

Pravin.


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