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To: RDM who wrote (2830)	7/28/2000 10:42:14 PM
From: muzosi	Respond to of 275872

Doesn't this conflict with Scumbria's "it's the pipeline size that matters" argument (20 is better than 12)? No. An N stage pipeline executes 1/N of an instruction per cycle. So the more stages you have, the smaller the work done per stage. But the advantage of longer pipelines is that you can clock them like hell. Also Scumbria has always said that equivalently clocked Athlon/PIII would be faster than P4. P4 is supposed to scale much better than PIII. Muzo

To: RDM who wrote (2830)	7/29/2000 12:24:56 AM
From: Scumbria	Read Replies (4) \| Respond to of 275872

RDM, Longer pipelines deliver higher clock rates, though there is an optimum length after which you start getting diminishing returns. The penalty for a longer pipe is fewer instructions executed per clock. The reason for this is that events which cause the pipeline to flush (branch misprediction, interrupts, etc.) take longer to recover from with a deeper pipeline, resulting in a lower average IPC (instructions per clock.) Performance is measured in MIPS (millions of instructions per second.) This is calculated as: instructions/second = instructions/clock * clocks/second Generally speaking, a deeper pipe produces more MIPS, though it appears that Intel may have deepened the pipe past optimal on Willy (28 stages.) Scumbria