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To: Paul Engel who wrote (4500)	8/11/2000 1:36:54 AM
From: chic_hearne	Read Replies (1) \| Respond to of 275872

Re: Kash: Re: "What is earliest you see it introduced - is Q1 2001 feasible." Paul: I doubt that is possible - the first silicon will have to be rock solid (possible ?) but the 0.13 micron process will probably need another quarter to get it into production readiness - to enable a clean transfer from TD to Manufacturing. My guess is Mid Q2 2001 time frame. Paul, They are doing this on Al? At .13um, that's where I hear of problems coming when looking at Al vs. Cu. Do think you can get the same yields on Al as Cu? thanks in advance for your honest answer, chic

To: Paul Engel who wrote (4500)	8/11/2000 1:39:27 AM
From: Joe NYC	Read Replies (1) \| Respond to of 275872

Paul, Is the .13u process they are talking about for both Tualatin and Northwood going to be aluminium or copper interconnects? Joe

To: Paul Engel who wrote (4500)	8/11/2000 1:43:43 AM
From: TechieGuy-alt	Read Replies (1) \| Respond to of 275872

Paul, >> My guess, Intel wanted the performance boost - especially for lower cost XEON versions. Wow! Why so much emphasis on coppermine? 0.13, 200Mhz FSB, 512KB L2 cache? Mid 2001 launch date! Won't P4 been out for more than 8 months by then? I presume that Intel will have limited capacity on 0.13 next year, why would they not want to ramp P4 to 0.13, decrease core size, decrease power, boost MHz and blast AMD out of the water? Mid 2001 introduction seems to be awfull late for the previous generation processor, when the next generation is supposed to be out for >=8 months! TIA, TG P.S. The comment about xeons does not sound right. I doubt that (multi processor) Xeons would ever be released with a 200Mhz bus. Too difficult to do with Intel's (current) GTL+ bus.