To: Dan3 who wrote (107570 ) 8/15/2000 12:41:18 AM From: semiconeng Read Replies (3) | Respond to Edge loss alone will account for at least 50 die. Cutting loss takes wafer area used by each die up to about 140mm2. Start at about 175 max for a perfect yield of whole chips from each wafer. Now remember that it takes about a quarter to go from wafer to chip so Q3 output corresponds to Q2 production when wafer starts at Dresden were ramping up from 600 per week. BEGINNING of Q2, April, to be exact. I doubt it stayed at 600 for the entire Q2 and part of Q3, as you seem to be trying to suggest:semibiznews.com So 1500 Austin + 750 (average) Dresden WSPW equals 2250 wafers per week times 175 times 13 weeks gives a max theoretical yield of 5.1 million and a final yield of 70% if they're going to sell 3.6 million chips this quarter. WAY low, and you're still counting only the chips started in Q2, and not any of the wafers started in Q3. Nice try at twisting the numbers though.Intel was getting up to 1 million die per week from a FAB that does 10K wafers per week and is pretty much dedicated to Coppermine. At 104 mm2 the wafer area used would be about 125mm2 to account for cutting losses and an edge loss of about 60 gives a max theoretical yield of about 190 die per wafer. So 10,000 times 13 times 190 is about 25 million out of which they got fewer than 13 million useable die (a 1 million die week was a big deal) and a final yield of less than 52%. And the bin split is lower.
