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To: Scumbria who wrote (5826)8/21/2000 4:54:35 AM
From: chic_hearneRespond to of 275872
 
Scumbria,

It sounds like you and others have been right all along about the P4 performance.

Thanks for the suggestion to take 280 to the SF airport. Of course this didn't help me one bit because I was flying United and they were having "pilot" problems and I didn't end up getting into Denver until 4am. The route should come in useful in the future though.

chic



To: Scumbria who wrote (5826)8/21/2000 5:02:58 AM
From: minnow68Read Replies (1) | Respond to of 275872
 
Scumbria,

Let's see, say the L1 cache in the Athlon gets a 99% hit rate and the L1 cache in the P4 is unknown. I believe the latencies are (BTW, can anyone authoritatively confirm or disprove these?):


Athlon L1   3 clks
       L2  10 clks

P4     L1   2 clks
       L2   7 clks

For the sake of argument, I'll assume that anything not in L1 will be in L2. I'll take 100 accesses. The Athlon gets (99*3) + (1*10) or 307 clocks of latency. P4 with different hit rates is below.


P4 L1 D-cache 40% hits (40*2) + (60*7) = 500 clks latency
              50%  "   (50*2) + (50*7) = 450 clks
              60%  "   (60*2) + (40*7) = 400 clks
              70%  "   (70*2) + (30*7) = 350 clks
              80%  "   (80*2) + (20*7) = 300 clks
              90%  "   (90*2) + (10*7) = 250 clks
             100%  "  (100*2)          = 200 clks


So an 80% L1 hit ratio would give the P4 overall data cache latency similar to an Athlon. So I predict on some programs, the cache struture of the P4 will yield as much as a third less latency than the Athlon cache. The other extreme (a 64K data array that is being repeatedly scanned) would see the Athlon having less than half the latency of the P4.

So a key question to me seems to be what kind of L1 hit rates would you expect from an 8K L1 d-cache on typical x86 code?

Finally, in almost all cases, there will be many more long waits in P4 compared to Athlon. Do you believe this will have a material impact on performance?

Mike



To: Scumbria who wrote (5826)8/21/2000 1:41:03 PM
From: Pravin KamdarRead Replies (1) | Respond to of 275872
 
Scumbria,

When Intel went from 8K Data in Pentium, to 16K data in Pentium MMX, the performance jumped up about 30%.

This should provide Intel an easy path to increase performance when they shrink the P4 die and add more L1.

Pravin.


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