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To: Bilow who wrote (7399)	9/2/2000 4:10:37 PM
From: minnow68	Read Replies (1) \| Respond to of 275872

Carl, You wrote "Just make a Karnaugh map for the function, and decode it into sum of products" I've wondered for almost 20 years since I taught this stuff (K-maps, etc.) just how many gates it would take to implement the basic math functions in exactly this way. I don't know of anyone who has ever done this. Mike

To: Bilow who wrote (7399)	9/2/2000 4:51:05 PM
From: muzosi	Respond to of 275872

for some odd reason, I think a level of logic as a two input NAND gate (preferably with 1x drive :-). Muzo

To: Bilow who wrote (7399)	9/2/2000 5:19:45 PM
From: Scumbria	Respond to of 275872

Carl, Of course I would have to use NAND gates with a couple thousand inputs... This would work. Only problem I can see is that the potential on the P-channel stack would have to be about 5,000V to make all the transistors switch. Scumbria

To: Bilow who wrote (7399)	9/2/2000 6:04:48 PM
From: TechieGuy-alt	Read Replies (1) \| Respond to of 275872

I could easily design a 32-bit adder that had only two stages of even simple NAND gates. Just make a Karnaugh map for the function, and decode it into sum of products. A computer would be useful for doing this. Of course I would have to use NAND gates with a couple thousand inputs... (dusting off my old VLSI design hat): Actually, from what I remember, in such an adder, the carry would have to ripple over. That's the last thing that you want if you want to do a quick add. I doubt that the carry bit could ripple through your 32 "single stage" adders in any reasonable amount of time. What you need is a look ahead carry adder (of some sort), and that would take more than 2 stages. JMHO TG