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To: sylvester80 who wrote (58738)	10/24/2000 6:58:40 PM
From: Jim McMannis	Respond to of 93625

RE:"The P3 borrowed a lot from the P2. The P2 was a new design. The P3 was not. Learn to read, LIAR" Sylvestor...maybe you're just STUPID? I suppose you'll be calling the printing on the chip a new design next. And if you don't think the P3 Coppermine had a lot of design changes you are really exposing your ignorance. How do you think Intel increased the performance by 15% over Katmai? I suppose moving cache on chip as was done on Mendocino and later Dixon wihich gave rise to mobile P3s wasn't a design change of the same magnitude? OTOH, they all are the P6 core. The same basic design. For some dumb reason you considered the P-II in the same class design-change wise as the P4...which is a new core...a new design. Jim

To: sylvester80 who wrote (58738)	10/24/2000 7:50:03 PM
From: jcholewa	Read Replies (3) \| Respond to of 93625

> The P2 had many firsts in new design. As did, for instance, the Coppermine. > Was the first cartridge CPU, Is this significant? They just changed the shape of the package holding the cpu die and the cache die/dice. > required new mobo, Coppermine required a new motherboard, as well. > had external cache, Whoa!!! Pentium Pro had external cache. Like the PII, the cache was a separate die that happened to be in the same package. Hell, external caches existed even before the PPro! Pentium and 80486 had external cache chips. Anyway, Coppermine was Intel's first cpu with greater than (architecture guys, correct me if I fib here, please) 64-bit wide on-die cache and their first with L2 cache latency measured in single digit cpu cycles. This is a much larger change than merely moving the already separated cache onto a PCB instead of plopping it on top of the cpu die (as was the case with the PPro). > and like the P4 will, > it saved Intel's butt. PII didn't save Intel's butt. Intel's butt did not need saving. Additionally, the PII was light years above the existing competition in average per-clock performance and in frequency ramping. In contrast, P4 is (reportedly, or at least according to Intel's benchmarks) behind the competition in average per-clock performance. It is probably only somewhat better in frequency ramping (as opposed to light years above). Granted, I'm accounting for the possibility of its per-process performance being above that of the competition, but this is nothing like the days of the Deschutes. > The P3 borrowed a lot from the P2. The P2 borrowed almost everything from the PPro. In addition, the P2's cache speeds were cut in half compared to the PPro, and its multiprocessing capabilities (I think) were sodomized until the P2XP appeared, long after. > The P2 was a new design. The P3 was not. The Katmai was a little too close to the PII, and I really just consider it a transition design, but the Coppermine was a drastically different design, especially considering that is has the same microarchitecture (and that's before taking into account that there were changes to the microarchitecture and the ISA, possibly far more than the PII had above the PPro). -JC