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To: jim kelley who wrote (115069)10/28/2000 6:08:01 PM
From: gnuman  Read Replies (1) | Respond to of 186894
 
Kelley,

1) They cut the 820 performance apparently for market positioning reasons ( about 15%).
They didn't cut performance on the i820. The power/performance problem you've been discussing on the Rambus thread is basically the latency issue when switching power modes on the RIMM's. (The Pool A and B situation). That's an RDRAM issue, not an Intel issue. The suckers can get pretty hot.

2) They tried to marry the 820 to a MTH which did not work, and gave the 820 a "black eye".
They did this at the request of the PC industry. RDRAM's are too expensive for that segment.

3) Having screwed up several times already they tried again to marry a MTP to an SOIC solution. Which was idiotic.
That was an attempt to save Timna, which had no market with DRDRAM.

The 820 should have been RDRAM only.
The i820 has been "RDRAM only" for some time now. Not selling too well, is my guess.

JMHO's



To: jim kelley who wrote (115069)10/28/2000 6:25:03 PM
From: Paul Engel  Read Replies (1) | Respond to of 186894
 
Jim - Re: 'Intel will not be able to distinguish its products from AMDs. After all, they both will be bandwidth limited architectures. This should open the market to companies other than Intel and AMD in the future who are willing to take a risk on leadership products. "

Please do me a favor.

When some CPU company comes out with DRDRAM requirements "to take a risk on leadership products", you be sure and post that announcement - right here on the Intel thread - to my attention.

I'd much appreciate that.

Paul



To: jim kelley who wrote (115069)10/28/2000 7:13:41 PM
From: Elmer  Read Replies (1) | Respond to of 186894
 
Re: "After all, they both will be bandwidth limited architectures"

If 3.2GBPs is bandwidth limited then I guess we'll just have to live with it until something really fast comes along...

BTW you keep mentioning the MTP. Wrong, it's MPT, as in Memory Protocol Translator.

EP