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To: Tenchusatsu who wrote (18781)	11/13/2000 8:47:08 AM
From: Dan3	Respond to of 275872

Re: The server market can really use large-cache processors, even on their 2-way SMP systems. And because of the way the 760MP chipset is designed (the MOESI cache protocol, two EV6 buses but only one DDR channel), that chipset could have also made good use of large-cache processors. Perhaps they've determined that it is better to put 8MB in the chipset than 2MB on the chip. Since it's necessary to wait for off chip confirmation of cache status in multi-chip systems anyway, chipset cache may be nearly as fast as on chip cache in MPU systems. And it can easily be made much larger and much cheaper. Scimiter will have a core logic with 6/8 MB of embedded memory that will perform as an L3 cache. There is no integrated graphics. The chipset will come out in the end of the first quarter of 2001. SuperGun will have Rendition graphics core integrated. It is to be launched in the third quarter of 2001. Mamba will be a server- and workstation-oriented chipset. It will be launched in the last quarter of 2001. ixbt-labs.com (the same info aburner recently posted) Dan

To: Tenchusatsu who wrote (18781)	11/13/2000 9:27:19 AM
From: Joe NYC	Respond to of 275872

Tenchusatsu, As far as corporate penetration, whether it is just plain client machines through workstations and servers is a space where AMD is completely absent. AMD will have to start from the bottom of this food chain, not from the top. What's stopping AMD from getting there? Certainly it is not a lack of powerful processor. After all, these people buy Celeron. AMD has to solve this problem soon. A huge cache Mustang is not part of the solution. It is a solution to another problem, one that AMD is not facing yet. Joe

To: Tenchusatsu who wrote (18781)	11/13/2000 9:41:03 AM
From: combjelly	Respond to of 275872

"that chipset could have also made good use of large-cache processors" I am not fully convinced of this. Consider that the bandwidth to the chipset for each processor is the same as the bandwidth to memory. If the chipset can arbitrate the requests quickly enough, this arrangement is very much like the crossbars that Sun uses, only much, much cheaper. The bandwidth to each processor should be no worse than that for a system using PC133 memory. Now until there are motherboards there is no way to get a handle on the latency issues for arbitration and what not, but it probably is no worse than the VIA chipsets. I think the 1 meg+ caches are more important for a features list check off box than it is for real performance. IMHO of course.

To: Tenchusatsu who wrote (18781)	11/13/2000 10:24:45 AM
From: Petz	Read Replies (3) \| Respond to of 275872

Tench, if large cache processors are such a hot ticket, how come Intel is stuck at 700 MHz -- and sells many more 800, 900 and 1000 MHz Xeons with 256K cache? Petz