To: Dale Knipschield who wrote (119111 ) 11/24/2000 11:56:03 AM From: Tony Viola Read Replies (2) | Respond to of 186894 Knip, that guy is as clueless as a decoy in a duck blind. 1999 was yet another annus horribilis for AMD, and they had to push their Athlon -- their last chance -- out the door as quickly as possible. Hence the untimely launch of the Athlon only a few days before X-mas. Athlon was introduced in June '99, then re-introduced (started actually shipping in some quantity) in August or Sept. They were initially planning to go to 0.13 micron around December 2000,... Sure, like AMD can just decide to go out and get a 0.13 micron process somewhere, like at Home Depot, that's about three quarters ahead of anyone else. In fact, going to 0.13 micron in december would obstruct the fast ramp of their Athlon, due to the fact that they would have to lock up valuable production capacity in system calibration calibration: probably got that word out of a metrics lab handbook. The huge level 2 cache would then require a huge die size. Besides, the feedback from their OEM partners was that they didn't really want a Mustang, especially since there would be no MP-chipset out to support it. No-one needs a single processor Server chip. translation: AMD can't do big (1MB - 2MB) on-chip caches.So what will happen in 2001? It's going to be very exciting. AMD has clearly made a bold gamble by introducing its 0.13 micron process simultaneously with its SOI technology, Has? Has means it's done, to me. But it's not done. It's a long ways off. Also, SOI is still an IBM only toy whose benefits don't clearly outweigh its development cost and risk.Intel is ready to put the PIV out at speeds of up to 2 GHz, but their OEMs are holding them back. Intel doesn't have a dual support for the PIV and there will be a need for completely new infrastructure when the 0.13 micron version arrives in volume production around Q401/Q102. Therefore it misses both the high end market and the performance market. This guy doesn't mind moving AMD schedules in, so he might as well move Intel schedules out at the same time. Intel dual support for the PIV, in the form of Foster is planned for about mid-year 2001, not Q401/Q102. In any case, dual PIIIs dual PIII Xeons with small caches will keep the OEMs very busy cranking out new 2-way servers up through mid 2001. Coppermine 1 GHz, Coppermine-T and Tualatin will be used for those. Then, Foster comes in. There is no room for AMD in there, possible exception if Foster slips and Palomino doesn't. Even if that happens, the OEMs are so far down the road with Foster based machines (1 - 1 1/2 year development cycles) they'd just wait for Intel anyway, rather than start from scratch with Palomino. These Motley Fool posters are by and large, with some exceptions, closer to Yahoo posters in knowledge and believability than they are to SI posters. Even that Oak, or whatever his name is, guy is quite clueless. Sorry, I calls-em as I sees-em. Tony