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To: Tenchusatsu who wrote (125464)1/18/2001 1:48:46 PM
From: Joe NYC  Respond to of 186894
 
Tenchusatsu,

My WAG is that existing EV6 platforms were way too expensive, and AMD had to redesign the whole SMP platform from the ground up in order to hit their desired market segment (which is basically the standard high-volume server market that Intel opened up).

My WAG is that AMD had and SDR SDRAM based SMP chipset in early stages, and the management determined that by the time it gets to market, it will not only be trailing edge, but very unbalanced, using 1 SDRAM channel to supply 2 chips with bandwidth capacity of 4 times the single SDRAM channel. Most likely, there was very limited interest on part of OEMs for this type of product, so AMD just killed it, and started from scratch on a DDR based chipset.

And since AMD obviously ran into some trouble on DDR front (single processor 760 chipset), it only make sense that the MP version of the same chip will be trailing the single processor version by a quarter or so.

Joe



To: Tenchusatsu who wrote (125464)1/18/2001 5:06:35 PM
From: Joseph Pareti  Read Replies (2) | Respond to of 186894
 
Ten, i'd just like to pick your brain: do you think they will keep the p4 L1 cache at 8k or do you see a chance to upgrade it. Thanks.



To: Tenchusatsu who wrote (125464)1/18/2001 11:21:16 PM
From: Dan3  Respond to of 186894
 
Re: My WAG is that existing EV6 platforms were way too expensive

What? The market isn't ready for a $100,000 AMD server? How about next week?

:-(

Dan