To: Dan3 who wrote (128291 ) 2/25/2001 1:49:25 PM From: Tony Viola Read Replies (1) | Respond to of 186894 Dan, >Athlon's smaller cacheline length lets it store twice the number of unique locations per K of cache as Foster. Its 16-way architecture can cache twice as many pages with the same LSB - critical for applications with many threads. The most recent information shows from Taiwan suggests they are going back to P3/Tualatin. P4 seems to be not scaling, while PIII looks like it will eventually do very well on .13. You're dreaming Dan. AMD will not be released in one top tier OEM server in 2001. 2002 is a stretch. Possible exception might be the setting Sun(w). Only reason I say that is because Sun hates Wintel, and is dumb enough to cut off their nose to spite their face. Bookmark this. Foster will be in all 5, or 8 of them, however many anyone counts. Tualatin: same. It has been in the plan for a long time, will coexist with P4/Foster for a long time. Tualatin will make possible faster, >1.0 GHz mobiles and much higher density modular servers, because of its lower power. I'm glad you see the beauty of Tualatin. It makes for a double wall barrier, with Foster, against any glimmer of hope for AMD in big OEM's servers. That's big OEM' servers, but small or large servers, either one. Tualatin is a perfect chip to cut 0.13 on, because it's a PIII, existing design, don't make 2 major changes at once. What does AMD have to hold a candle to 2.0 GHz DP Foster with SMT technology in July? Watch for the flood of OEMs announcing servers with it inside. MP Foster to follow, to run up to 16 CPU servers. These are the Xeon replacements, if you remember that one. Man, it is getting so deep around here. Tony