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To: dale_laroy who wrote (133801)5/1/2001 12:45:20 AM
From: Dan3  Read Replies (2) | Respond to of 186894
 
Re: Prior to Intel introducing a value segment P4 processor, which will probably occur in 2003, AMD will have a free ride with using Fab25 to produce Duron processors. But once Intel introduces the value segment P4

AMD expects to be selling "value" 64 bit processors against Intel's "value" 32 bit P4 in the 2003 time frame.

AMD needs a 300mm wafer Fab34 to begin ramp in 2003. This fab should ramp at the rate of four 0.13-micron 300mm wafer starts of production at Fab34 for every nine 200mm wafer starts at Fab25 lost to flash production.

My guess is that the need to convert FAB 25 to flash is being questioned. The 30% cost savings of 300mm wafers vs. 200mm wafers is relatively insignificant. P4 costs 3 to 5 times as much to produce as Athlon, and that's the least of its problems. The theoretical 30% cost savings of 300mm wafers is barely an issue. AMD may hold out quite a while before committing to 300mm. SOI and .10 on 200mm wafers is much more important to AMD.

AMD is hunkered down for a really brutal price war (IMHO). They don't think there will be much revenue for anybody in the sector for a while.

By 2003, it could be that P4 will have sufficient software that is friendly to its architecture that performance may not be an issue. The best way for AMD to delay this potential is to convince software developers that the total number of P4 processors will always be less than the total number of Athlon/Duron processors, even if AMD has to license Athlon/Duron to IBM and/or Motorola to insure that this is the case.

Isn't that why AMD is adding SSE/SSE2 to the Athlon family?

Regards,

Dan