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Technology Stocks : Rambus (RMBS) - Eagle or Penguin -- Ignore unavailable to you. Want to Upgrade?

To: gnuman who wrote (72018)	5/5/2001 11:14:44 AM
From: Don Green	Read Replies (2) \| Respond to of 93625

Rambus loses patent fight By: Drew Cullen Posted: 05/05/2001 at 10:41 GMT theregister.co.uk Rambus, the pugnacious memory IP designer, has received a bloody nose its US court fight against Infineon, with the judge dismissing the three remaining patent claims against the German chipmaker. "We are disappointed with the court's decision," said Rambus CEO Geoff Tate."If today's decision is allowed to stand, all companies that innovate risk having their intellectual property rights unjustly expropriated." Rambus says it will appeal the ruling. Rambus is the designer of RDRAM, a high-speed memory technology recommend by Intel for the Pentium 4. The company has sought to extend its patent and royalty remit over DDR SDRAM, a competing and cheaper memory design, and many DRAM makers have succumbed to its demands. They will now be considering renegotiating those royalty payments. Rambus originally brought claims of 57 patent infringements against Infineon. All but three were thrown out earlier this week by Judge Robert Payne, of the US District Court for the eastern district of Virginia. Infineon argued that Rambus had used improper methods to obtain patents which could be applicable to DDR SDRAM. It appears that Judge Payne agrees. This is not the end for Rambus, but it does appear to be the beginning of the end of the legal wars. There are some more infringement cases pending against chipmakers in the US and Europe. The precedent set by Judge Payne does not bode well for the company, or its shareholders. ®

To: gnuman who wrote (72018)	5/5/2001 12:47:06 PM
From: NightOwl	Respond to of 93625

GP, I am beginning to think that "capitulation" is just another myth of the human experience.<vbg> Doesn't anybody just "surrender" any more? <Ho Ha8-> Is this the last real lesson of the last 30,000 years?<g> 0\|0

To: gnuman who wrote (72018)	5/6/2001 1:50:40 AM
From: Bilow	Read Replies (2) \| Respond to of 93625

Hi Gene Parrott; The last RDRAM is not on the end of the bus. The bus starts with a controller I/O pin on one end, and ends with a termination resistor at the other end. The RDRAM chips are all in the middle. As I stated before, the RDRAM chips all see Z/2, while the controller, being on one end of the bus, sees Z. Re: "Because of the above, each RDRAM must drive a signal onto a floating bus." Floating isn't the right word, but I don't know what the right word is. Maybe a better way of putting what I am tring to say is that "Each RDRAM must drive a signal onto a bus that is not quiescent." By this I simply meant that the RDRAM outputs have to drive signals into a bus that does not start with any particular voltage. This simply implies that the RDRAM current sources must have a wide output compliance. Re the data eyes... This is in reference to my note that the RDRAM outputs do not form data eyes except at the controller. You wrote: " Because the only place the "eye" is valid is at the controller pin, it makes no sense, (and is probably unintelligible), to look at an "eye" at the RDRAM output", and while what you wrote is true, it is also exactly what I wrote. What I implied, but did not spell out, is that it is traditional, when debugging systems, to look at signals both at the source and at the destination. With the RSL bus, this is impossible, at least for when RDRAM chips are driving. For this reason, it is a bus that is more difficult to debug. Your other comments are more or less in agreement with me. -- Carl