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To: Bilow who wrote (72436)5/9/2001 10:26:13 PM
From: Scumbria  Read Replies (1) | Respond to of 93625
 
Kaptain Karl,

It's not my code. I'm debugging someone else's junk.

I love the "downto" operator. It looks like VHDL was designed by someone with no prior exposure to software.

Scumbria



To: Bilow who wrote (72436)5/9/2001 11:22:33 PM
From: muzosi  Read Replies (2) | Respond to of 93625
 
that's why i like verilog better; it's a simpler language and it is a lot more predictable during synthesis. for fpgas, my experience is that floorplanning, and placement is a lot more important than synthesis quality; you can code individiul luts if you want in either of the languages. for control logic, slightly higher level coding is ok but for data path structural coding with a wisely selected set of rlocs really help.


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