To: Paul Engel who wrote (137928 ) 6/22/2001 9:07:10 AM From: Dan3 Read Replies (4) | Respond to of 186894 Re: Intel got NO POWER reduction on the Tualatin! That 20% power reduction was a best case and no reduction or nearly no reduction may still turn out to be the case. The Tualatin seems to be able to run at a lower voltage, but the power numbers don't come down much. Coppermine was running about 34w at around 1.7v, right? If you add in the bus drivers, tualatin may be closer to that 34w figure than the 27w or 28w being offered as power use under typical loads. The data sheet for the .18 PIII mobile clearly states that the power figure are for max consumption and also offers power ratings for 1.35v - where core/cache power is 18 watts, 10 watts lower than the core/cache consumption figure for Tualatin. We need to see if there is a similar (lowered voltage) consumption figure for Tualatin, but right now, the data out indicates that Tualatin actually consumes significantly more power at a given voltage than Coppermine!developer.intel.com The amperage a 1.35v for Coppermine is 12.8 while at 1.45v for Tualatin it's 19.4. At 1.7 Coppermine amperage jumps to 21.1 while for Tualatin we aren't given another figure. So, you know what, Paul? I have to agree with you and admit to a very big mistake in the more recent post I made. After more examination, it is becoming clear that Tualatin actually uses considerably more power at a given voltage than coppermine. And since, so far, there haven't been sufficient offsetting voltage reductions achieved, it may be that the .13 transistors leak so badly that they provide no power savings at all - they may even use more power! Here are the only clearly Tualatin specs out so far:developer.intel.com We have to see if there will be additional numbers coming out that show the ability to save power at lower voltages - but so far, no good. By contrast G4 uses a lot less (can someone confirm - I recall numbers in the single digits) and given these power numbers from tualatin, we could even see a renewed interest in transmeta. A lot of vague impressions of substantial power savings were being hinted at and the final result appears to be less than the savings AMD saw from a re-layout of its core on an existing process. Does this confirm the need for SOI when moving to .13? Dan PS - If Intel just did what AMD did, and used a new layout to save power instead of building another FAB (with more coming) they could have saved $3.5 Billion - or at least deferred spending it through the period of this semi downturn. $3.5 Billion could have kept Intel going for nearly 2 months, and that cash would have come in handy if margins stay low.