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To: Dan3 who wrote (138007)6/24/2001 10:48:50 AM
From: fyodor_  Read Replies (2) | Respond to of 186894
 
Dan: Last fall / this spring, we saw AMD, a company with only one FAB that makes significant money and certainly not a company with limitless capital to play with, do something very strange:

With delicate microprocessor operations continuing below, (they had no choice) they built a large FAB extension on pillars above the Dresden FAB. They did this to provide for SOI in their .13 copper process. They said that without SOI, moving to .13 provided much less of a benefit than had come from earlier shrinks.


Dan, I strongly suggest you read some overviews of semiconductor manufacturing and processes. IIRC, IBM and Intel both have some good articles available (if you are feeling a bit more adventurous, you might try one of IBM's online publications:

IBM's Journal of R&D: research.ibm.com
IBM MicroNews: chips.ibm.com

The point of all this is that there is MUCH more to a process than simply transistor sizes, Cu/Al and SOI.

Just because AMD (&Moto) didn't experience much of a performance increase when going from HIPL6 to HIPL7 (or whatever the process code names are), it doesn't correlate to the same for Intel. There are all sorts of aspects that can be changed from process generation to process generation.

Specifically, Intel is drastically increasing the aspect ratio of their wires (the "height", as opposed to "width", of course). This will minimize the RC delay increase that is normally experienced when going to smaller dimensions (increasing the height of the wire decreases the resistance).

This is only one thing. There are all sorts of other factors... oxide thicknesses, trench slopes, yadayadayada... I'm not a process guy, so I don't claim to know a lot of these things, but I have read a bit here and there...

-fyo