To: John Walliker who wrote (75144 ) 6/29/2001 5:29:11 PM From: Bilow Read Replies (1) | Respond to of 93625 Hi John Walliker; Re: "Parity/ECC Rambus modules are 18 bits wide, so there will be 8 protection bits per 64 bit data word. This is sufficient to detect and correct a 4-bit fault. " Wrong. Let's count up the total number of unique 72-bit "codes" you will have to have in order to be able to have enough to map all possible 4-bit (or smaller) errors down to a unique 64-bit "token". I forget what the coding theoresists call this, but basically what you do is put a "buffer" around each valid (i.e. zero error) 72-bit code, and in the error decoding you map everything in that buffer back to one particular input token. That means that for each distinct 64-bit number, we need a 72-bit code to associate with it. And, in addition, we must be able to change any 1, any 2, any 3, and any 4 bits of it and get a new 72-bit code that is uniquely mappable (i.e. correctable) to the original 64-bit token. This starts out as a counting problem. (If counting the number of codes I need gives a result that is smaller than 2^72, then the counting problem becomes an assignment problem, and then a digital logic problem, where I try to define the mappings in such a way as to make the error correcting be as efficient as possible. But if there are too many codes to fit in a 72-bit field, the logic can't be designed.) The number of 72-bit codes that must be uniquely mappable to that original 64-bit token is found by adding together the number of 0-bit (i.e. clean), 1-bit, 2-bit, 3-bit and 4-bit errors. For example, the number of 3-bit errors is found by computing 72 choose 3 = 69!3!/72! = 59,640. Adding up the five classes of errors we get: (72) + (72) + (72) + (72) + (72) = 1,091,059 ( 0) ( 1) ( 2) ( 3) ( 4) Total 72-bit codes that must each map to a distinct 64-bit token: 1,091,059. Total number of 64-bit tokens: 2^64. Total number of 72-bit codes is therefore = 2^64 x 1,091,059 > 2^84. But this is bigger than 2^72. Ooops. You're 13-bits short of getting 4-bit error correction on 64-bit words with an 8-bit ECC, LOL. Translation: If you want to transmit N-bit tokens using 72-bit words, and you require that the transmission be 4-bit error correctable (4-EC), then you are restricted to no more than 51-bit tokens. In addition, just because the counting argument shows that you can theoretically fit 2^51 tokens in the 2^72 codes doesn't mean that there actually exists any such mapping, (or that if one does exist, you're going to be the guy that finds it, LOL). In actual use, the Rambus system sends 128/144-bit bursts. Such a burst would have 16 error bits out of the 144-bit code. Lets total up the number of 144-bit "codes" that must map to each (desired) 128-bit "token" and see if that coding is possible: (144) + ... (144) = 3.993 x 10^12 = 2^(41.861) ( 0 ) ( 8 ) You're therefore short by 42-16 = 26 bits. The best that can be sent with 8 error bits in 144 is 144-42 = 102.That's funny!!! With 72-bits you can send 51 bits of 4EC tokens, while with 144-bits you can send 102 bits of 8EC tokens!!! Sounds like Shannon to me, LOL!!! The above calculation is probably a pretty good indication that I work with ECC codes all the time and you've never designed one in your life. Why are you giving memory design advice to losers on this thread? -- Carl P.S. Maybe now you have some sort of an inkling of an idea what is expected out of commercial memory system designers, LOL!!! Not so easy, is it?