Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: dale_laroy who wrote (48642)	7/22/2001 6:06:18 PM
From: Elmer	Respond to of 275872

AMD is not using SOI at 0.18-micron. Is there no limit to Dan's blunders? AMD's estimate of Northwood die size versus Clawhammer die size is 140mm2 versus 105mm2. So, a 300mm2 wafer has 2.25x the die area of a 200mm2 wafer, but the Northwood will only be 33% larger than the Clawhammer. Intel will etch more than 1.6 times as many Northwoods per wafer as AMD does Clawhammers, and any decrease in percentage yield resulting from the larger die size of Northwood will be more than offset by the decrease in percentage yield resulting from the use of SOI in Clawhammer. Clever boy! Good post. EP

To: dale_laroy who wrote (48642)	7/22/2001 6:16:43 PM
From: Dan3	Read Replies (3) \| Respond to of 275872

Re: the Northwood will only be 33% larger than the Clawhammer Each 300mm wafer is more expensive to process than each 200mm wafer, but not enough more expensive to make up for the far greater surface area of the 300mm wafers. Estimates I've seen are that savings are on the order of 40% for 300mm vs. 200mm wafers. Given the almost inevitable decrease in yields for a 33% larger chip, clawhammer, and certainly thoroughbred, on 200mm should cost about the same to produce as Northwood on 300mm. I suppose my main point would be that the variation in wafer costs that 300mm wafers represent is one of the least important factors to either company going forward. Why do you expect yields to drop for SOI? The pre-processing of wafers will certainly add something to costs, but there will also be an opportunity for better quality control of the raw wafers entering the line. I think there is a good chance for an improved wafer yield (as opposed to die yield) given the in-house processing AMD will be doing on its wafers.