To: Dan3 who wrote (48646 ) 7/23/2001 12:18:17 AM From: dale_laroy Respond to of 275872 >Each 300mm wafer is more expensive to process than each 200mm wafer, but not enough more expensive to make up for the far greater surface area of the 300mm wafers. Estimates I've seen are that savings are on the order of 40% for 300mm vs. 200mm wafers.< More specifically, 30% to 40%. Of course, copper will lead to a 20% to 30% reduction in costs relative to aluminum. But in both cases we are talking about with a mature process. UMC estimates that the crossover between the per die cost of 300mm versus 200mm will occur in Q1 2003. Until then 300mm wafers will actually have a higher per die cost than 200mm wafers. >Given the almost inevitable decrease in yields for a 33% larger chip, clawhammer, and certainly thoroughbred, on 200mm should cost about the same to produce as Northwood on 300mm.< Thoroughbred will be much cheaper than Northwood, because Thoroughbred will use bulk silicon and not be produced after the per die cost of using 300mm wafers even reaches crossover with 200mm wafers. Barton will probably also have a cost advantage over Northwood because the cost advantage of 300mm over 200mm will probably not be significant enough during the life of Barton. Clawhammer will probably last long enough to see significant savings for 300mm versus 200mm. Best guess is that Clawhammer will start off with production costs that are lower than those of Northwood, but reach parity well before Fab35 is ready. >I suppose my main point would be that the variation in wafer costs that 300mm wafers represent is one of the least important factors to either company going forward.< Not true, the cost of 300mm wafer production will be a liability to Intel throughout 2002, and become an asset to Intel for most of 2003, and forward up to Fab35. AMD would do well to have a 300mm wafer fab ready to start production in mid-2003. AMD would also do well to farm out production to IBM's and/or UMC's 300mm wafer fab(s) beginning in H1 2002 or Q1 2003, to ramp volumes enough to justify ramping inhouse production at a 300mm wafer fab in mid-2003. >Why do you expect yields to drop for SOI?< Because AMD states that there will be about a 10% drop in yield. >The pre-processing of wafers will certainly add something to costs, but there will also be an opportunity for better quality control of the raw wafers entering the line. I would imagine that eventually SOI could result in an increase in yield, but probably not until the 0.10-micron generation. At that point Intel may be using SOI so relative yields may be irrelevant.