To: Tenchusatsu who wrote (140387 ) 7/29/2001 5:52:37 PM From: Dan3 Read Replies (1) | Respond to of 186894 Re: claim that 2-way Palomino beats 4-way Xeon in MANY benchmarks. There aren't a lot of even vaguely impartial tests in this area. The only test attempting to compare Dual 1.2GHZ Athlons with Dual 1.7GHZ Xeons in a server application showed Athlon beating Xeon pretty convincingly.anandtech.com The GTL+ bus has certainly been a lot easier for implementing SMP boards - Intel, VIA, serverworks, etc. have been cranking out such SMP chipsets for years. But putting even two chips on such a bus results in contention for the memory bus. It's a simple bus that doesn't scale well for multiprocessor applications, but it does make it easy to add additional processors, however fast any incremental benefit may fade. Xeon is also limited to caching 12 locations for any given offset. As long as you are running a small number of processes, that's plenty, but as you scale up the size of a server and increase the number of users and/or the complexity of the applications being run, Athlon's ability to cache 18 offsets per page will keep its performance from degrading under loads that flatten Xeon. A Xeon with 4 meg of on-die L2 cache would still be limited to caching 12 locations with the same LSBs. Even a Duron with only 64K of L2 can cache 18 locations with the same LSB. As a server is scaled up and expected to run more processes, the PIII, P4, or any Xeon will begin thrashing its cache long before any Athlon or Duron. So the Athlon architecture, with its 2-way + 16-way cache puts less of a load on its memory bus to begin with than Xeon with its 4-way + 8-way cache. Add to this the point to point design of Athlon's memory bus compared to Xeon's simple shared bus design, and it would be quite amazing if Athlons didn't substantially outperform Xeon in multiuser database and other server applications. Xeon is architected like a network hub, while Athlon is configured like a network switch. The heavier the load, and the larger the number of "users" (processes in this case) the more beneficial the switch architecture is compared to the hub architecture. There is, of course, much more to selling multiuser systems than just performance, but the same thing that will save Intel from AMD (for a while) will also make it very hard for Itanium to make much headway for quite a while. Eventually, Intel will have to offer up something better than a simple PC architecture with extra processors tacked on, especially when the competition has a real server platform available. If they don't, AMD will take that market away from them, just like Intel's better performing processors have finally been making marketshare gains against SUN in the workstation market.