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To: Tenchusatsu who wrote (140451)7/31/2001 4:49:12 AM
From: pgerassi  Read Replies (2) | Respond to of 186894
 
Dear Tench:

Stop fooling yourself. EV6 was a P2P link. It did allow AMD to use a very expensive chipset to get to n way if it desired. Intel used the chipsets of others to do 8 way and up before. AMD had to figure out how to make a cheap chipset do 2 way P2P. The next step only requires a HT port between two 762 NBs. This could be implemented inside the NB as a 3 way HT switch, 1 way to the old NB instead of a PCI port, 1 way to a SB and 1 way to the other NB. Now AMD has a 4 way. For the next level all they do is add a port to the HT switch, N way with a node of 2 way CPUs.

It is easy to see many other simple ways to 4 way and up. The biggest need is for a HT switch somewhere. The larger ones go into NBs (and later twin core CPU chips) and the three ways are used in left HT port, center HT port to IO bus or SB, and left HT port. That way gets PCI, PCI-X, PCI 64/66, AGP, Infiniband, ISA, NIC and SB connected. Thus AMD will have more I/O slots than Intel.

Pete